[llvm] r362595 - [TargetLowering] SimplifyDemandedBits - pull out shift value type. NFCI.

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Wed Jun  5 03:59:04 2019
New Revision: 362595

URL: http://llvm.org/viewvc/llvm-project?rev=362595&view=rev
Log:
[TargetLowering] SimplifyDemandedBits - pull out shift value type. NFCI.

Will be used more in an upcoming patch.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=362595&r1=362594&r2=362595&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Wed Jun  5 03:59:04 2019
@@ -1136,6 +1136,7 @@ bool TargetLowering::SimplifyDemandedBit
       if (SA->getAPIntValue().uge(BitWidth))
         break;
 
+      EVT ShiftVT = Op1.getValueType();
       unsigned ShAmt = SA->getZExtValue();
       APInt InDemandedMask = (DemandedBits << ShAmt);
 
@@ -1160,7 +1161,7 @@ bool TargetLowering::SimplifyDemandedBit
                 Opc = ISD::SHL;
               }
 
-              SDValue NewSA = TLO.DAG.getConstant(Diff, dl, Op1.getValueType());
+              SDValue NewSA = TLO.DAG.getConstant(Diff, dl, ShiftVT);
               return TLO.CombineTo(
                   Op, TLO.DAG.getNode(Opc, dl, VT, Op0.getOperand(0), NewSA));
             }