[llvm] r362529 - [NFC][Codegen][PowerPC] Autogenerate shift-cmp.ll test
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 4 10:05:34 PDT 2019
Author: lebedevri
Date: Tue Jun 4 10:05:34 2019
New Revision: 362529
URL: http://llvm.org/viewvc/llvm-project?rev=362529&view=rev
Log:
[NFC][Codegen][PowerPC] Autogenerate shift-cmp.ll test
Being affected by upcoming patch
Modified:
llvm/trunk/test/CodeGen/PowerPC/shift-cmp.ll
Modified: llvm/trunk/test/CodeGen/PowerPC/shift-cmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/shift-cmp.ll?rev=362529&r1=362528&r2=362529&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/shift-cmp.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/shift-cmp.ll Tue Jun 4 10:05:34 2019
@@ -1,54 +1,54 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-n32:64"
target triple = "powerpc64le-unknown-linux-gnu"
define i1 @and_cmp_variable_power_of_two(i32 %x, i32 %y) {
+; CHECK-LABEL: and_cmp_variable_power_of_two:
+; CHECK: # %bb.0:
+; CHECK-NEXT: subfic 4, 4, 32
+; CHECK-NEXT: rlwnm 3, 3, 4, 31, 31
+; CHECK-NEXT: blr
%shl = shl i32 1, %y
%and = and i32 %x, %shl
%cmp = icmp eq i32 %and, %shl
ret i1 %cmp
-
-; CHECK-LABEL: @and_cmp_variable_power_of_two
-; CHECK: subfic 4, 4, 32
-; CHECK: rlwnm 3, 3, 4, 31, 31
-; CHECK: blr
}
define i1 @and_cmp_variable_power_of_two_64(i64 %x, i64 %y) {
+; CHECK-LABEL: and_cmp_variable_power_of_two_64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: subfic 4, 4, 64
+; CHECK-NEXT: rldcl 3, 3, 4, 63
+; CHECK-NEXT: blr
%shl = shl i64 1, %y
%and = and i64 %x, %shl
%cmp = icmp eq i64 %and, %shl
ret i1 %cmp
-
-; CHECK-LABEL: @and_cmp_variable_power_of_two_64
-; CHECK: subfic 4, 4, 64
-; CHECK: rldcl 3, 3, 4, 63
-; CHECK: blr
}
define i1 @and_ncmp_variable_power_of_two(i32 %x, i32 %y) {
+; CHECK-LABEL: and_ncmp_variable_power_of_two:
+; CHECK: # %bb.0:
+; CHECK-NEXT: subfic 4, 4, 32
+; CHECK-NEXT: nor 3, 3, 3
+; CHECK-NEXT: rlwnm 3, 3, 4, 31, 31
+; CHECK-NEXT: blr
%shl = shl i32 1, %y
%and = and i32 %x, %shl
%cmp = icmp ne i32 %and, %shl
ret i1 %cmp
-
-; CHECK-LABEL: @and_ncmp_variable_power_of_two
-; CHECK-DAG: subfic 4, 4, 32
-; CHECK-DAG: nor [[REG:[0-9]+]], 3, 3
-; CHECK: rlwnm 3, [[REG]], 4, 31, 31
-; CHECK: blr
}
define i1 @and_ncmp_variable_power_of_two_64(i64 %x, i64 %y) {
+; CHECK-LABEL: and_ncmp_variable_power_of_two_64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: not 3, 3
+; CHECK-NEXT: subfic 4, 4, 64
+; CHECK-NEXT: rldcl 3, 3, 4, 63
+; CHECK-NEXT: blr
%shl = shl i64 1, %y
%and = and i64 %x, %shl
%cmp = icmp ne i64 %and, %shl
ret i1 %cmp
-
-; CHECK-LABEL: @and_ncmp_variable_power_of_two_64
-; CHECK-DAG: subfic 4, 4, 64
-; CHECK-DAG: not [[REG:[0-9]+]], 3
-; CHECK: rldcl 3, [[REG]], 4, 63
-; CHECK: blr
}
-
More information about the llvm-commits
mailing list