[PATCH] D59990: AMDGPU. Divergence driven ISel. Assign register class for cross block values according to the divergence.
Alexander via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 4 05:13:46 PDT 2019
alex-t added a comment.
In D59990#1527631 <https://reviews.llvm.org/D59990#1527631>, @nhaehnle wrote:
> A number of Mesa piglit tests are also affected at least on Bonaire (but it seems to not be GPU-specific, I haven't had a chance to look at it further).
>
> - bin/ext_transform_feedback-order elements triangles
> - bin/ext_transform_feedback-order elements points
> - bin/ext_transform_feedback-order elements lines
> - bin/ext_transform_feedback-order arrays triangles>
> - bin/ext_transform_feedback-order arrays points
> - bin/ext_transform_feedback-order arrays lines
> - arb_clear_buffer_object-formats (96-bit clears)
>
>
> It's unclear whether the regression is caused by this particular commit or by the subsequent ASAN fix.
Could you please try the newest fix that prevent SGPR to VGPR copies sinking out of the loop?
If it does not help I will revert the change.
Repository:
rL LLVM
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https://reviews.llvm.org/D59990/new/
https://reviews.llvm.org/D59990
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