[PATCH] D62651: [ARM] Add FP16 vector insert/extract patterns

[Mikhail Maltsev via Phabricator via llvm-commits]

miyuki added a comment.

In D62651#1525589 <https://reviews.llvm.org/D62651#1525589>, @efriedma wrote:

> LGTM
>
> We could possibly use a custom inserter to generate the vins sequence, but it would probably involve some benchmarking to make sure there aren't any unexpected performance penalties due to the weird register usage.  So I'm happy to put that off for now.
>
> (On a side-note, I think you can insert a float into element zero of a vector with two vext instructions, which is the same number of instructions, but maybe lower latency.)


Thanks for a suggestion. I've raised a ticket in our internal issue tracking system, so that we can return to it later.


Repository:
  rL LLVM

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https://reviews.llvm.org/D62651