[PATCH] D55506: [RFC v2] Allow target to handle STRICT floating-point nodes

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

Hopefully modelling all SSE/AVX/AVX512 FP instruction as having an implicit use of the control portion of MXCSR for rounding mode and exception controls won't create a significant constraint on the backend. I think most of the trouble would start if we had it as an implicit def as well. Properly annotating this in tablegen will likely be tedious and error prone unfortunately. This is just due to the complexity of the 3 different encoding forms as well as the shared multiclasses in the tablegen files. I can't promise that some integer and FP stuff aren't using the same multiclasses.


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  https://reviews.llvm.org/D55506/new/

https://reviews.llvm.org/D55506