[llvm] r362457 - [X86] Add test cases for 32 and 64 bit versions of PR42118. NFC

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 3 15:34:16 PDT 2019


Author: ctopper
Date: Mon Jun  3 15:34:15 2019
New Revision: 362457

URL: http://llvm.org/viewvc/llvm-project?rev=362457&view=rev
Log:
[X86] Add test cases for 32 and 64 bit versions of PR42118. NFC

Modified:
    llvm/trunk/test/CodeGen/X86/bmi.ll

Modified: llvm/trunk/test/CodeGen/X86/bmi.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bmi.ll?rev=362457&r1=362456&r2=362457&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bmi.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bmi.ll Mon Jun  3 15:34:15 2019
@@ -1149,3 +1149,84 @@ define i64 @blsr64_branch(i64 %x) {
 }
 
 declare void @bar()
+
+define void @pr42118_i32(i32 %x) {
+; X86-LABEL: pr42118_i32:
+; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl %eax, %ecx
+; X86-NEXT:    negl %ecx
+; X86-NEXT:    andnl %eax, %ecx, %eax
+; X86-NEXT:    jne .LBB48_1
+; X86-NEXT:  # %bb.2:
+; X86-NEXT:    jmp bar # TAILCALL
+; X86-NEXT:  .LBB48_1:
+; X86-NEXT:    retl
+;
+; X64-LABEL: pr42118_i32:
+; X64:       # %bb.0:
+; X64-NEXT:    movl %edi, %eax
+; X64-NEXT:    negl %eax
+; X64-NEXT:    andnl %edi, %eax, %eax
+; X64-NEXT:    jne .LBB48_1
+; X64-NEXT:  # %bb.2:
+; X64-NEXT:    jmp bar # TAILCALL
+; X64-NEXT:  .LBB48_1:
+; X64-NEXT:    retq
+  %tmp = sub i32 0, %x
+  %tmp1 = and i32 %tmp, %x
+  %cmp = icmp eq i32 %tmp1, %x
+  br i1 %cmp, label %1, label %2
+
+  tail call void @bar()
+  br label %2
+
+  ret void
+}
+
+define void @pr42118_i64(i64 %x) {
+; X86-LABEL: pr42118_i64:
+; X86:       # %bb.0:
+; X86-NEXT:    pushl %esi
+; X86-NEXT:    .cfi_def_cfa_offset 8
+; X86-NEXT:    .cfi_offset %esi, -8
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:    xorl %edx, %edx
+; X86-NEXT:    movl %eax, %esi
+; X86-NEXT:    negl %esi
+; X86-NEXT:    sbbl %ecx, %edx
+; X86-NEXT:    andnl %ecx, %edx, %ecx
+; X86-NEXT:    andnl %eax, %esi, %eax
+; X86-NEXT:    orl %ecx, %eax
+; X86-NEXT:    jne .LBB49_1
+; X86-NEXT:  # %bb.2:
+; X86-NEXT:    popl %esi
+; X86-NEXT:    .cfi_def_cfa_offset 4
+; X86-NEXT:    jmp bar # TAILCALL
+; X86-NEXT:  .LBB49_1:
+; X86-NEXT:    .cfi_def_cfa_offset 8
+; X86-NEXT:    popl %esi
+; X86-NEXT:    .cfi_def_cfa_offset 4
+; X86-NEXT:    retl
+;
+; X64-LABEL: pr42118_i64:
+; X64:       # %bb.0:
+; X64-NEXT:    movq %rdi, %rax
+; X64-NEXT:    negq %rax
+; X64-NEXT:    andnq %rdi, %rax, %rax
+; X64-NEXT:    jne .LBB49_1
+; X64-NEXT:  # %bb.2:
+; X64-NEXT:    jmp bar # TAILCALL
+; X64-NEXT:  .LBB49_1:
+; X64-NEXT:    retq
+  %tmp = sub i64 0, %x
+  %tmp1 = and i64 %tmp, %x
+  %cmp = icmp eq i64 %tmp1, %x
+  br i1 %cmp, label %1, label %2
+
+  tail call void @bar()
+  br label %2
+
+  ret void
+}




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