[PATCH] D62818: [InstCombine] Allow ((X << Y) & SignMask) != 0 to be optimized as (X << Y) s< 0.

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

On the instcombine side, one thing worth noting which isn't called out in the commit message is the interaction with other instcombine patterns.  In the testcase, note that the final IR actually doesn't contain any mask; instead, it checks `icmp slt i32 [[SHL]], 0`.  Huihui, please update the commit message to make this clear.

It's possible we should also implement the related pattern to transform `(x & (signbit >> y)) != 0` to `(x << y) < 0`, sure.

In terms of whether it's universally profitable, I'm not sure... I guess if somehow "icmp ne X, 0" is free, but "icmp slt X, 0" isn't, it could be an issue, but I don't think that applies to any architecture I can think of.


Repository:
  rL LLVM

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  https://reviews.llvm.org/D62818/new/

https://reviews.llvm.org/D62818