[PATCH] D59990: AMDGPU. Divergence driven ISel. Assign register class for cross block values according to the divergence.
Samuel Pitoiset via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 3 05:04:34 PDT 2019
hakzsam added a comment.
In D59990#1527275 <https://reviews.llvm.org/D59990#1527275>, @hakzsam wrote:
> In D59990#1521409 <https://reviews.llvm.org/D59990#1521409>, @alex-t wrote:
>
> > In D59990#1517891 <https://reviews.llvm.org/D59990#1517891>, @hakzsam wrote:
> >
> > > Hi there,
> > >
> > > This change introduces a regression with RADV, all dEQP-VK.subgroups.arithmetic.framebuffer.* are failing now.
> > > Can someone look into this?
> > > Thanks!
> >
> >
> > I have a patch that fixes the issue in another test suite. Could you please suggest how to check if it also fixes RADV?
> > https://reviews.llvm.org/D62614
>
>
> This patch fixes the CTS failures on my side. I have just tried the latest version.
Err, only a subset is fixed actually.
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rL LLVM
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https://reviews.llvm.org/D59990/new/
https://reviews.llvm.org/D59990
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