[PATCH] D40554: [PowerPC] Fix bugs in sign-/zero-extension elimination
Nemanja Ivanovic via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 3 04:11:26 PDT 2019
nemanjai accepted this revision.
nemanjai added a comment.
This revision is now accepted and ready to land.
LGTM.
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Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:3848
+ auto SrcExt = isSignOrZeroExtended(SrcReg, BinOpDepth, MRI);
+ return std::pair<bool,bool>(SrcExt.first | IsSExt, SrcExt.second | IsZExt);
}
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The bitwise or seems like an odd choice here since `IsSExt/IsZExt` shouldn't possibly be `true` here and also I think logical or seems more natural for `bool` variables.
The change to logical or doesn't require another revision.
================
Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:3859
+ auto SrcExt = isSignOrZeroExtended(SrcReg, BinOpDepth, MRI);
+ return std::pair<bool,bool>(SrcExt.first | IsSExt, SrcExt.second | IsZExt);
+ }
----------------
These can probably be logical or's as well. Same with the below ones.
================
Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:3901
+ if (!MI->getOperand(I).isReg()) {
+ // todo: Handle isImm()
+ return std::pair<bool,bool>(false, false);
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Please remove this `todo`.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D40554/new/
https://reviews.llvm.org/D40554
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