[PATCH] D62806: [X86] X86DAGToDAGISel::matchBitExtract(): pattern c: truncation awareness

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri created this revision.
lebedev.ri added reviewers: RKSimon, craig.topper, spatel.
lebedev.ri added a project: LLVM.
lebedev.ri added a parent revision: D62793: [X86] X86DAGToDAGISel::matchBitExtract(): pattern b: truncation awareness.

The one thing of note here is that the 'bitwidth' constant (32/64) was previously pessimistic.
Given `x & (-1 >> (C - z))`, we were taking `C` to be `bitwidth(x)`, but in reality
we want `(-1 >> (C - z))` pattern to mean "low z bits must be all-ones".
And for that, `C` should be `bitwidth(-1 >> (C - z))`, i.e. of the shift operation itself.

Last pattern D does not seem to exhibit any of these truncation issues.
Although it has the opposite problem - if we extract low bits (no shift) from i64,
and then truncate to i32, then we fail to shrink this 64-bit extraction into 32-bit extraction.


Repository:
  rL LLVM

https://reviews.llvm.org/D62806

Files:
  lib/Target/X86/X86ISelDAGToDAG.cpp
  test/CodeGen/X86/extract-bits.ll
  test/CodeGen/X86/extract-lowbits.ll

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