[PATCH] D62786: [X86] X86DAGToDAGISel::matchBitExtract(): pattern a: truncation awareness
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Jun 1 16:30:13 PDT 2019
lebedev.ri created this revision.
lebedev.ri added reviewers: craig.topper, RKSimon, spatel.
lebedev.ri added a project: LLVM.
Finally tying up loose ends here.
The problem is quite simple:
If we have pattern `(x >> start) & (1 << nbits) - 1`,
and then truncate the result, that truncation will be propagated upwards,
into the `and`. And that isn't currently handled.
I'm only fixing pattern `a` here,
the same fix will be needed for patterns `b`/`c` too.
I *think* this isn't missing any extra legality checks,
since we only look past truncations. Similary, i don't think
we can get any other truncation there other than i64->i32.
Repository:
rL LLVM
https://reviews.llvm.org/D62786
Files:
lib/Target/X86/X86ISelDAGToDAG.cpp
test/CodeGen/X86/extract-bits.ll
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