[PATCH] D62777: [SelectionDAG] ComputeNumSignBits - support constant pool values from target

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.
RKSimon added reviewers: spatel, craig.topper, lebedev.ri, andreadb.
Herald added a project: LLVM.

As I mentioned on D61887 <https://reviews.llvm.org/D61887> we don't get many hits on ComputeNumSignBits as we did on computeKnownBits.

The case we do get is interesting though - it allows us to use the 'ConditionalNegate' combine in combineLogicBlendIntoPBLENDV to remove a select.

It comes too late for SSE41 (BLENDV) cases, but SSE2 tests can hit it now. We should probably try to make use of this for SSE41+ targets as well - avoiding variable blends is usually a good idea. I'll investigate as a followup.


Repository:
  rL LLVM

https://reviews.llvm.org/D62777

Files:
  lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  test/CodeGen/X86/combine-sdiv.ll

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