[llvm] r362295 - [NFC][Codegen] shift-amount-mod.ll: drop innermost operation
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Sat Jun 1 04:07:11 PDT 2019
On Sat, Jun 1, 2019 at 2:05 PM Roman Lebedev via llvm-commits
<llvm-commits at lists.llvm.org> wrote:
>
> Author: lebedevri
> Date: Sat Jun 1 04:08:29 2019
> New Revision: 362295
>
> URL: http://llvm.org/viewvc/llvm-project?rev=362295&view=rev
> Log:
> [NFC][Codegen] shift-amount-mod.ll: drop innermost operation
Err, that of course was supposed to be "sink-addsub-of-const.ll: drop
innermost operation"
> I have initially added it in for test to display both
> whether the binop w/ constant is sinked or hoisted.
> But as it can be seen from the 'sub (sub C, %x), %y'
> test, that actually conceals the issues it is supposed to test.
>
> At least two more patterns are unhandled:
> * 'add (sub C, %x), %y' - D62266
> * 'sub (sub C, %x), %y'
>
> Modified:
> llvm/trunk/test/CodeGen/AArch64/sink-addsub-of-const.ll
> llvm/trunk/test/CodeGen/X86/sink-addsub-of-const.ll
>
> Modified: llvm/trunk/test/CodeGen/AArch64/sink-addsub-of-const.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/sink-addsub-of-const.ll?rev=362295&r1=362294&r2=362295&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/AArch64/sink-addsub-of-const.ll (original)
> +++ llvm/trunk/test/CodeGen/AArch64/sink-addsub-of-const.ll Sat Jun 1 04:08:29 2019
> @@ -6,170 +6,148 @@
> ; add (add %x, C), %y
> ; Outer 'add' is commutative - 2 variants.
>
> -define i32 @sink_add_of_const_to_add0(i32 %a, i32 %b, i32 %c) {
> +define i32 @sink_add_of_const_to_add0(i32 %a, i32 %b) {
> ; CHECK-LABEL: sink_add_of_const_to_add0:
> ; CHECK: // %bb.0:
> ; CHECK-NEXT: add w8, w0, w1
> -; CHECK-NEXT: add w8, w8, w2
> ; CHECK-NEXT: add w0, w8, #32 // =32
> ; CHECK-NEXT: ret
> - %t0 = add i32 %a, %b
> - %t1 = add i32 %t0, 32 ; constant always on RHS
> - %r = add i32 %t1, %c
> + %t0 = add i32 %a, 32 ; constant always on RHS
> + %r = add i32 %t0, %b
> ret i32 %r
> }
> -define i32 @sink_add_of_const_to_add1(i32 %a, i32 %b, i32 %c) {
> +define i32 @sink_add_of_const_to_add1(i32 %a, i32 %b) {
> ; CHECK-LABEL: sink_add_of_const_to_add1:
> ; CHECK: // %bb.0:
> ; CHECK-NEXT: add w8, w0, w1
> -; CHECK-NEXT: add w8, w8, w2
> ; CHECK-NEXT: add w0, w8, #32 // =32
> ; CHECK-NEXT: ret
> - %t0 = add i32 %a, %b
> - %t1 = add i32 %t0, 32 ; constant always on RHS
> - %r = add i32 %c, %t1
> + %t0 = add i32 %a, 32 ; constant always on RHS
> + %r = add i32 %b, %t0
> ret i32 %r
> }
>
> ; add (sub %x, C), %y
> ; Outer 'add' is commutative - 2 variants.
>
> -define i32 @sink_sub_of_const_to_add0(i32 %a, i32 %b, i32 %c) {
> +define i32 @sink_sub_of_const_to_add0(i32 %a, i32 %b) {
> ; CHECK-LABEL: sink_sub_of_const_to_add0:
> ; CHECK: // %bb.0:
> ; CHECK-NEXT: add w8, w0, w1
> -; CHECK-NEXT: add w8, w8, w2
> ; CHECK-NEXT: sub w0, w8, #32 // =32
> ; CHECK-NEXT: ret
> - %t0 = add i32 %a, %b
> - %t1 = sub i32 %t0, 32
> - %r = add i32 %t1, %c
> + %t0 = sub i32 %a, 32
> + %r = add i32 %t0, %b
> ret i32 %r
> }
> -define i32 @sink_sub_of_const_to_add1(i32 %a, i32 %b, i32 %c) {
> +define i32 @sink_sub_of_const_to_add1(i32 %a, i32 %b) {
> ; CHECK-LABEL: sink_sub_of_const_to_add1:
> ; CHECK: // %bb.0:
> ; CHECK-NEXT: add w8, w0, w1
> -; CHECK-NEXT: add w8, w8, w2
> ; CHECK-NEXT: sub w0, w8, #32 // =32
> ; CHECK-NEXT: ret
> - %t0 = add i32 %a, %b
> - %t1 = sub i32 %t0, 32
> - %r = add i32 %c, %t1
> + %t0 = sub i32 %a, 32
> + %r = add i32 %b, %t0
> ret i32 %r
> }
>
> ; add (sub C, %x), %y
> ; Outer 'add' is commutative - 2 variants.
>
> -define i32 @sink_sub_from_const_to_add0(i32 %a, i32 %b, i32 %c) {
> +define i32 @sink_sub_from_const_to_add0(i32 %a, i32 %b) {
> ; CHECK-LABEL: sink_sub_from_const_to_add0:
> ; CHECK: // %bb.0:
> -; CHECK-NEXT: add w8, w0, w1
> -; CHECK-NEXT: mov w9, #32
> -; CHECK-NEXT: sub w8, w9, w8
> -; CHECK-NEXT: add w0, w8, w2
> +; CHECK-NEXT: mov w8, #32
> +; CHECK-NEXT: sub w8, w8, w0
> +; CHECK-NEXT: add w0, w8, w1
> ; CHECK-NEXT: ret
> - %t0 = add i32 %a, %b
> - %t1 = sub i32 32, %t0
> - %r = add i32 %t1, %c
> + %t0 = sub i32 32, %a
> + %r = add i32 %t0, %b
> ret i32 %r
> }
> -define i32 @sink_sub_from_const_to_add1(i32 %a, i32 %b, i32 %c) {
> +define i32 @sink_sub_from_const_to_add1(i32 %a, i32 %b) {
> ; CHECK-LABEL: sink_sub_from_const_to_add1:
> ; CHECK: // %bb.0:
> -; CHECK-NEXT: add w8, w0, w1
> -; CHECK-NEXT: mov w9, #32
> -; CHECK-NEXT: sub w8, w9, w8
> -; CHECK-NEXT: add w0, w2, w8
> -; CHECK-NEXT: ret
> - %t0 = add i32 %a, %b
> - %t1 = sub i32 32, %t0
> - %r = add i32 %c, %t1
> +; CHECK-NEXT: mov w8, #32
> +; CHECK-NEXT: sub w8, w8, w0
> +; CHECK-NEXT: add w0, w1, w8
> +; CHECK-NEXT: ret
> + %t0 = sub i32 32, %a
> + %r = add i32 %b, %t0
> ret i32 %r
> }
>
> ; sub (add %x, C), %y
> ; sub %y, (add %x, C)
>
> -define i32 @sink_add_of_const_to_sub(i32 %a, i32 %b, i32 %c) {
> +define i32 @sink_add_of_const_to_sub(i32 %a, i32 %b) {
> ; CHECK-LABEL: sink_add_of_const_to_sub:
> ; CHECK: // %bb.0:
> ; CHECK-NEXT: sub w8, w0, w1
> -; CHECK-NEXT: sub w8, w8, w2
> ; CHECK-NEXT: add w0, w8, #32 // =32
> ; CHECK-NEXT: ret
> - %t0 = sub i32 %a, %b
> - %t1 = add i32 %t0, 32 ; constant always on RHS
> - %r = sub i32 %t1, %c
> + %t0 = add i32 %a, 32 ; constant always on RHS
> + %r = sub i32 %t0, %b
> ret i32 %r
> }
> -define i32 @sink_add_of_const_to_sub2(i32 %a, i32 %b, i32 %c) {
> +define i32 @sink_add_of_const_to_sub2(i32 %a, i32 %b) {
> ; CHECK-LABEL: sink_add_of_const_to_sub2:
> ; CHECK: // %bb.0:
> ; CHECK-NEXT: sub w8, w1, w0
> -; CHECK-NEXT: add w8, w2, w8
> ; CHECK-NEXT: sub w0, w8, #32 // =32
> ; CHECK-NEXT: ret
> - %t0 = sub i32 %a, %b
> - %t1 = add i32 %t0, 32 ; constant always on RHS
> - %r = sub i32 %c, %t1
> + %t0 = add i32 %a, 32 ; constant always on RHS
> + %r = sub i32 %b, %t0
> ret i32 %r
> }
>
> ; sub (sub %x, C), %y
> ; sub %y, (sub %x, C)
>
> -define i32 @sink_sub_of_const_to_sub(i32 %a, i32 %b, i32 %c) {
> +define i32 @sink_sub_of_const_to_sub(i32 %a, i32 %b) {
> ; CHECK-LABEL: sink_sub_of_const_to_sub:
> ; CHECK: // %bb.0:
> ; CHECK-NEXT: sub w8, w0, w1
> -; CHECK-NEXT: sub w8, w8, w2
> ; CHECK-NEXT: sub w0, w8, #32 // =32
> ; CHECK-NEXT: ret
> - %t0 = sub i32 %a, %b
> - %t1 = sub i32 %t0, 32
> - %r = sub i32 %t1, %c
> + %t0 = sub i32 %a, 32
> + %r = sub i32 %t0, %b
> ret i32 %r
> }
> -define i32 @sink_sub_of_const_to_sub2(i32 %a, i32 %b, i32 %c) {
> +define i32 @sink_sub_of_const_to_sub2(i32 %a, i32 %b) {
> ; CHECK-LABEL: sink_sub_of_const_to_sub2:
> ; CHECK: // %bb.0:
> -; CHECK-NEXT: sub w8, w1, w0
> -; CHECK-NEXT: add w8, w8, w2
> -; CHECK-NEXT: add w0, w8, #32 // =32
> +; CHECK-NEXT: mov w8, #32
> +; CHECK-NEXT: sub w8, w8, w0
> +; CHECK-NEXT: add w0, w1, w8
> ; CHECK-NEXT: ret
> - %t0 = sub i32 %a, %b
> - %t1 = sub i32 %t0, 32
> - %r = sub i32 %c, %t1
> + %t0 = sub i32 %a, 32
> + %r = sub i32 %b, %t0
> ret i32 %r
> }
>
> ; sub (sub C, %x), %y
> ; sub %y, (sub C, %x)
>
> -define i32 @sink_sub_from_const_to_sub(i32 %a, i32 %b, i32 %c) {
> +define i32 @sink_sub_from_const_to_sub(i32 %a, i32 %b) {
> ; CHECK-LABEL: sink_sub_from_const_to_sub:
> ; CHECK: // %bb.0:
> -; CHECK-NEXT: sub w8, w1, w0
> -; CHECK-NEXT: sub w8, w8, w2
> -; CHECK-NEXT: add w0, w8, #32 // =32
> +; CHECK-NEXT: mov w8, #32
> +; CHECK-NEXT: sub w8, w8, w0
> +; CHECK-NEXT: sub w0, w8, w1
> ; CHECK-NEXT: ret
> - %t0 = sub i32 %a, %b
> - %t1 = sub i32 32, %t0
> - %r = sub i32 %t1, %c
> + %t0 = sub i32 32, %a
> + %r = sub i32 %t0, %b
> ret i32 %r
> }
> -define i32 @sink_sub_from_const_to_sub2(i32 %a, i32 %b, i32 %c) {
> +define i32 @sink_sub_from_const_to_sub2(i32 %a, i32 %b) {
> ; CHECK-LABEL: sink_sub_from_const_to_sub2:
> ; CHECK: // %bb.0:
> -; CHECK-NEXT: sub w8, w0, w1
> -; CHECK-NEXT: add w8, w8, w2
> +; CHECK-NEXT: add w8, w0, w1
> ; CHECK-NEXT: sub w0, w8, #32 // =32
> ; CHECK-NEXT: ret
> - %t0 = sub i32 %a, %b
> - %t1 = sub i32 32, %t0
> - %r = sub i32 %c, %t1
> + %t0 = sub i32 32, %a
> + %r = sub i32 %b, %t0
> ret i32 %r
> }
>
> @@ -180,191 +158,167 @@ define i32 @sink_sub_from_const_to_sub2(
> ; add (add %x, C), %y
> ; Outer 'add' is commutative - 2 variants.
>
> -define <4 x i32> @vec_sink_add_of_const_to_add0(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
> +define <4 x i32> @vec_sink_add_of_const_to_add0(<4 x i32> %a, <4 x i32> %b) {
> ; CHECK-LABEL: vec_sink_add_of_const_to_add0:
> ; CHECK: // %bb.0:
> ; CHECK-NEXT: adrp x8, .LCPI12_0
> -; CHECK-NEXT: ldr q3, [x8, :lo12:.LCPI12_0]
> +; CHECK-NEXT: ldr q2, [x8, :lo12:.LCPI12_0]
> ; CHECK-NEXT: add v0.4s, v0.4s, v1.4s
> ; CHECK-NEXT: add v0.4s, v0.4s, v2.4s
> -; CHECK-NEXT: add v0.4s, v0.4s, v3.4s
> ; CHECK-NEXT: ret
> - %t0 = add <4 x i32> %a, %b
> - %t1 = add <4 x i32> %t0, <i32 42, i32 24, i32 undef, i32 46> ; constant always on RHS
> - %r = add <4 x i32> %t1, %c
> + %t0 = add <4 x i32> %a, <i32 42, i32 24, i32 undef, i32 46> ; constant always on RHS
> + %r = add <4 x i32> %t0, %b
> ret <4 x i32> %r
> }
> -define <4 x i32> @vec_sink_add_of_const_to_add1(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
> +define <4 x i32> @vec_sink_add_of_const_to_add1(<4 x i32> %a, <4 x i32> %b) {
> ; CHECK-LABEL: vec_sink_add_of_const_to_add1:
> ; CHECK: // %bb.0:
> ; CHECK-NEXT: adrp x8, .LCPI13_0
> -; CHECK-NEXT: ldr q3, [x8, :lo12:.LCPI13_0]
> +; CHECK-NEXT: ldr q2, [x8, :lo12:.LCPI13_0]
> ; CHECK-NEXT: add v0.4s, v0.4s, v1.4s
> ; CHECK-NEXT: add v0.4s, v0.4s, v2.4s
> -; CHECK-NEXT: add v0.4s, v0.4s, v3.4s
> ; CHECK-NEXT: ret
> - %t0 = add <4 x i32> %a, %b
> - %t1 = add <4 x i32> %t0, <i32 42, i32 24, i32 undef, i32 46> ; constant always on RHS
> - %r = add <4 x i32> %c, %t1
> + %t0 = add <4 x i32> %a, <i32 42, i32 24, i32 undef, i32 46> ; constant always on RHS
> + %r = add <4 x i32> %b, %t0
> ret <4 x i32> %r
> }
>
> ; add (sub %x, C), %y
> ; Outer 'add' is commutative - 2 variants.
>
> -define <4 x i32> @vec_sink_sub_of_const_to_add0(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
> +define <4 x i32> @vec_sink_sub_of_const_to_add0(<4 x i32> %a, <4 x i32> %b) {
> ; CHECK-LABEL: vec_sink_sub_of_const_to_add0:
> ; CHECK: // %bb.0:
> ; CHECK-NEXT: adrp x8, .LCPI14_0
> -; CHECK-NEXT: ldr q3, [x8, :lo12:.LCPI14_0]
> +; CHECK-NEXT: ldr q2, [x8, :lo12:.LCPI14_0]
> ; CHECK-NEXT: add v0.4s, v0.4s, v1.4s
> -; CHECK-NEXT: add v0.4s, v0.4s, v2.4s
> -; CHECK-NEXT: sub v0.4s, v0.4s, v3.4s
> +; CHECK-NEXT: sub v0.4s, v0.4s, v2.4s
> ; CHECK-NEXT: ret
> - %t0 = add <4 x i32> %a, %b
> - %t1 = sub <4 x i32> %t0, <i32 42, i32 24, i32 undef, i32 46>
> - %r = add <4 x i32> %t1, %c
> + %t0 = sub <4 x i32> %a, <i32 42, i32 24, i32 undef, i32 46>
> + %r = add <4 x i32> %t0, %b
> ret <4 x i32> %r
> }
> -define <4 x i32> @vec_sink_sub_of_const_to_add1(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
> +define <4 x i32> @vec_sink_sub_of_const_to_add1(<4 x i32> %a, <4 x i32> %b) {
> ; CHECK-LABEL: vec_sink_sub_of_const_to_add1:
> ; CHECK: // %bb.0:
> ; CHECK-NEXT: adrp x8, .LCPI15_0
> -; CHECK-NEXT: ldr q3, [x8, :lo12:.LCPI15_0]
> +; CHECK-NEXT: ldr q2, [x8, :lo12:.LCPI15_0]
> ; CHECK-NEXT: add v0.4s, v0.4s, v1.4s
> -; CHECK-NEXT: add v0.4s, v0.4s, v2.4s
> -; CHECK-NEXT: sub v0.4s, v0.4s, v3.4s
> +; CHECK-NEXT: sub v0.4s, v0.4s, v2.4s
> ; CHECK-NEXT: ret
> - %t0 = add <4 x i32> %a, %b
> - %t1 = sub <4 x i32> %t0, <i32 42, i32 24, i32 undef, i32 46>
> - %r = add <4 x i32> %c, %t1
> + %t0 = sub <4 x i32> %a, <i32 42, i32 24, i32 undef, i32 46>
> + %r = add <4 x i32> %b, %t0
> ret <4 x i32> %r
> }
>
> ; add (sub C, %x), %y
> ; Outer 'add' is commutative - 2 variants.
>
> -define <4 x i32> @vec_sink_sub_from_const_to_add0(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
> +define <4 x i32> @vec_sink_sub_from_const_to_add0(<4 x i32> %a, <4 x i32> %b) {
> ; CHECK-LABEL: vec_sink_sub_from_const_to_add0:
> ; CHECK: // %bb.0:
> ; CHECK-NEXT: adrp x8, .LCPI16_0
> -; CHECK-NEXT: ldr q3, [x8, :lo12:.LCPI16_0]
> +; CHECK-NEXT: ldr q2, [x8, :lo12:.LCPI16_0]
> +; CHECK-NEXT: sub v0.4s, v2.4s, v0.4s
> ; CHECK-NEXT: add v0.4s, v0.4s, v1.4s
> -; CHECK-NEXT: sub v0.4s, v3.4s, v0.4s
> -; CHECK-NEXT: add v0.4s, v0.4s, v2.4s
> ; CHECK-NEXT: ret
> - %t0 = add <4 x i32> %a, %b
> - %t1 = sub <4 x i32> <i32 42, i32 24, i32 undef, i32 46>, %t0
> - %r = add <4 x i32> %t1, %c
> + %t0 = sub <4 x i32> <i32 42, i32 24, i32 undef, i32 46>, %a
> + %r = add <4 x i32> %t0, %b
> ret <4 x i32> %r
> }
> -define <4 x i32> @vec_sink_sub_from_const_to_add1(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
> +define <4 x i32> @vec_sink_sub_from_const_to_add1(<4 x i32> %a, <4 x i32> %b) {
> ; CHECK-LABEL: vec_sink_sub_from_const_to_add1:
> ; CHECK: // %bb.0:
> ; CHECK-NEXT: adrp x8, .LCPI17_0
> -; CHECK-NEXT: ldr q3, [x8, :lo12:.LCPI17_0]
> -; CHECK-NEXT: add v0.4s, v0.4s, v1.4s
> -; CHECK-NEXT: sub v0.4s, v3.4s, v0.4s
> -; CHECK-NEXT: add v0.4s, v2.4s, v0.4s
> +; CHECK-NEXT: ldr q2, [x8, :lo12:.LCPI17_0]
> +; CHECK-NEXT: sub v0.4s, v2.4s, v0.4s
> +; CHECK-NEXT: add v0.4s, v1.4s, v0.4s
> ; CHECK-NEXT: ret
> - %t0 = add <4 x i32> %a, %b
> - %t1 = sub <4 x i32> <i32 42, i32 24, i32 undef, i32 46>, %t0
> - %r = add <4 x i32> %c, %t1
> + %t0 = sub <4 x i32> <i32 42, i32 24, i32 undef, i32 46>, %a
> + %r = add <4 x i32> %b, %t0
> ret <4 x i32> %r
> }
>
> ; sub (add %x, C), %y
> ; sub %y, (add %x, C)
>
> -define <4 x i32> @vec_sink_add_of_const_to_sub(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
> +define <4 x i32> @vec_sink_add_of_const_to_sub(<4 x i32> %a, <4 x i32> %b) {
> ; CHECK-LABEL: vec_sink_add_of_const_to_sub:
> ; CHECK: // %bb.0:
> ; CHECK-NEXT: adrp x8, .LCPI18_0
> -; CHECK-NEXT: ldr q3, [x8, :lo12:.LCPI18_0]
> +; CHECK-NEXT: ldr q2, [x8, :lo12:.LCPI18_0]
> ; CHECK-NEXT: sub v0.4s, v0.4s, v1.4s
> -; CHECK-NEXT: sub v0.4s, v0.4s, v2.4s
> -; CHECK-NEXT: add v0.4s, v0.4s, v3.4s
> +; CHECK-NEXT: add v0.4s, v0.4s, v2.4s
> ; CHECK-NEXT: ret
> - %t0 = sub <4 x i32> %a, %b
> - %t1 = add <4 x i32> %t0, <i32 42, i32 24, i32 undef, i32 46> ; constant always on RHS
> - %r = sub <4 x i32> %t1, %c
> + %t0 = add <4 x i32> %a, <i32 42, i32 24, i32 undef, i32 46> ; constant always on RHS
> + %r = sub <4 x i32> %t0, %b
> ret <4 x i32> %r
> }
> -define <4 x i32> @vec_sink_add_of_const_to_sub2(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
> +define <4 x i32> @vec_sink_add_of_const_to_sub2(<4 x i32> %a, <4 x i32> %b) {
> ; CHECK-LABEL: vec_sink_add_of_const_to_sub2:
> ; CHECK: // %bb.0:
> ; CHECK-NEXT: adrp x8, .LCPI19_0
> -; CHECK-NEXT: ldr q3, [x8, :lo12:.LCPI19_0]
> +; CHECK-NEXT: ldr q2, [x8, :lo12:.LCPI19_0]
> ; CHECK-NEXT: sub v0.4s, v1.4s, v0.4s
> -; CHECK-NEXT: add v0.4s, v2.4s, v0.4s
> -; CHECK-NEXT: sub v0.4s, v0.4s, v3.4s
> +; CHECK-NEXT: sub v0.4s, v0.4s, v2.4s
> ; CHECK-NEXT: ret
> - %t0 = sub <4 x i32> %a, %b
> - %t1 = add <4 x i32> %t0, <i32 42, i32 24, i32 undef, i32 46> ; constant always on RHS
> - %r = sub <4 x i32> %c, %t1
> + %t0 = add <4 x i32> %a, <i32 42, i32 24, i32 undef, i32 46> ; constant always on RHS
> + %r = sub <4 x i32> %b, %t0
> ret <4 x i32> %r
> }
>
> ; sub (sub %x, C), %y
> ; sub %y, (sub %x, C)
>
> -define <4 x i32> @vec_sink_sub_of_const_to_sub(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
> +define <4 x i32> @vec_sink_sub_of_const_to_sub(<4 x i32> %a, <4 x i32> %b) {
> ; CHECK-LABEL: vec_sink_sub_of_const_to_sub:
> ; CHECK: // %bb.0:
> ; CHECK-NEXT: adrp x8, .LCPI20_0
> -; CHECK-NEXT: ldr q3, [x8, :lo12:.LCPI20_0]
> +; CHECK-NEXT: ldr q2, [x8, :lo12:.LCPI20_0]
> ; CHECK-NEXT: sub v0.4s, v0.4s, v1.4s
> ; CHECK-NEXT: sub v0.4s, v0.4s, v2.4s
> -; CHECK-NEXT: sub v0.4s, v0.4s, v3.4s
> ; CHECK-NEXT: ret
> - %t0 = sub <4 x i32> %a, %b
> - %t1 = sub <4 x i32> %t0, <i32 42, i32 24, i32 undef, i32 46>
> - %r = sub <4 x i32> %t1, %c
> + %t0 = sub <4 x i32> %a, <i32 42, i32 24, i32 undef, i32 46>
> + %r = sub <4 x i32> %t0, %b
> ret <4 x i32> %r
> }
> -define <4 x i32> @vec_sink_sub_of_const_to_sub2(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
> +define <4 x i32> @vec_sink_sub_of_const_to_sub2(<4 x i32> %a, <4 x i32> %b) {
> ; CHECK-LABEL: vec_sink_sub_of_const_to_sub2:
> ; CHECK: // %bb.0:
> ; CHECK-NEXT: adrp x8, .LCPI21_0
> -; CHECK-NEXT: ldr q3, [x8, :lo12:.LCPI21_0]
> -; CHECK-NEXT: sub v0.4s, v1.4s, v0.4s
> -; CHECK-NEXT: add v0.4s, v0.4s, v2.4s
> -; CHECK-NEXT: add v0.4s, v0.4s, v3.4s
> +; CHECK-NEXT: ldr q2, [x8, :lo12:.LCPI21_0]
> +; CHECK-NEXT: sub v0.4s, v2.4s, v0.4s
> +; CHECK-NEXT: add v0.4s, v1.4s, v0.4s
> ; CHECK-NEXT: ret
> - %t0 = sub <4 x i32> %a, %b
> - %t1 = sub <4 x i32> %t0, <i32 42, i32 24, i32 undef, i32 46>
> - %r = sub <4 x i32> %c, %t1
> + %t0 = sub <4 x i32> %a, <i32 42, i32 24, i32 undef, i32 46>
> + %r = sub <4 x i32> %b, %t0
> ret <4 x i32> %r
> }
>
> ; sub (sub C, %x), %y
> ; sub %y, (sub C, %x)
>
> -define <4 x i32> @vec_sink_sub_from_const_to_sub(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
> +define <4 x i32> @vec_sink_sub_from_const_to_sub(<4 x i32> %a, <4 x i32> %b) {
> ; CHECK-LABEL: vec_sink_sub_from_const_to_sub:
> ; CHECK: // %bb.0:
> ; CHECK-NEXT: adrp x8, .LCPI22_0
> -; CHECK-NEXT: ldr q3, [x8, :lo12:.LCPI22_0]
> -; CHECK-NEXT: sub v0.4s, v1.4s, v0.4s
> -; CHECK-NEXT: sub v0.4s, v0.4s, v2.4s
> -; CHECK-NEXT: add v0.4s, v0.4s, v3.4s
> +; CHECK-NEXT: ldr q2, [x8, :lo12:.LCPI22_0]
> +; CHECK-NEXT: sub v0.4s, v2.4s, v0.4s
> +; CHECK-NEXT: sub v0.4s, v0.4s, v1.4s
> ; CHECK-NEXT: ret
> - %t0 = sub <4 x i32> %a, %b
> - %t1 = sub <4 x i32> <i32 42, i32 24, i32 undef, i32 46>, %t0
> - %r = sub <4 x i32> %t1, %c
> + %t0 = sub <4 x i32> <i32 42, i32 24, i32 undef, i32 46>, %a
> + %r = sub <4 x i32> %t0, %b
> ret <4 x i32> %r
> }
> -define <4 x i32> @vec_sink_sub_from_const_to_sub2(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
> +define <4 x i32> @vec_sink_sub_from_const_to_sub2(<4 x i32> %a, <4 x i32> %b) {
> ; CHECK-LABEL: vec_sink_sub_from_const_to_sub2:
> ; CHECK: // %bb.0:
> ; CHECK-NEXT: adrp x8, .LCPI23_0
> -; CHECK-NEXT: ldr q3, [x8, :lo12:.LCPI23_0]
> -; CHECK-NEXT: sub v0.4s, v0.4s, v1.4s
> -; CHECK-NEXT: add v0.4s, v0.4s, v2.4s
> -; CHECK-NEXT: sub v0.4s, v0.4s, v3.4s
> +; CHECK-NEXT: ldr q2, [x8, :lo12:.LCPI23_0]
> +; CHECK-NEXT: add v0.4s, v0.4s, v1.4s
> +; CHECK-NEXT: sub v0.4s, v0.4s, v2.4s
> ; CHECK-NEXT: ret
> - %t0 = sub <4 x i32> %a, %b
> - %t1 = sub <4 x i32> <i32 42, i32 24, i32 undef, i32 46>, %t0
> - %r = sub <4 x i32> %c, %t1
> + %t0 = sub <4 x i32> <i32 42, i32 24, i32 undef, i32 46>, %a
> + %r = sub <4 x i32> %b, %t0
> ret <4 x i32> %r
> }
>
> Modified: llvm/trunk/test/CodeGen/X86/sink-addsub-of-const.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sink-addsub-of-const.ll?rev=362295&r1=362294&r2=362295&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/sink-addsub-of-const.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/sink-addsub-of-const.ll Sat Jun 1 04:08:29 2019
> @@ -7,156 +7,135 @@
> ; add (add %x, C), %y
> ; Outer 'add' is commutative - 2 variants.
>
> -define i32 @sink_add_of_const_to_add0(i32 %a, i32 %b, i32 %c) {
> +define i32 @sink_add_of_const_to_add0(i32 %a, i32 %b) {
> ; X32-LABEL: sink_add_of_const_to_add0:
> ; X32: # %bb.0:
> ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
> ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
> -; X32-NEXT: addl {{[0-9]+}}(%esp), %ecx
> ; X32-NEXT: addl %ecx, %eax
> ; X32-NEXT: addl $32, %eax
> ; X32-NEXT: retl
> ;
> ; X64-LABEL: sink_add_of_const_to_add0:
> ; X64: # %bb.0:
> -; X64-NEXT: # kill: def $edx killed $edx def $rdx
> +; X64-NEXT: # kill: def $esi killed $esi def $rsi
> ; X64-NEXT: # kill: def $edi killed $edi def $rdi
> -; X64-NEXT: addl %esi, %edi
> -; X64-NEXT: leal 32(%rdx,%rdi), %eax
> +; X64-NEXT: leal 32(%rdi,%rsi), %eax
> ; X64-NEXT: retq
> - %t0 = add i32 %a, %b
> - %t1 = add i32 %t0, 32 ; constant always on RHS
> - %r = add i32 %t1, %c
> + %t0 = add i32 %a, 32 ; constant always on RHS
> + %r = add i32 %t0, %b
> ret i32 %r
> }
> -define i32 @sink_add_of_const_to_add1(i32 %a, i32 %b, i32 %c) {
> +define i32 @sink_add_of_const_to_add1(i32 %a, i32 %b) {
> ; X32-LABEL: sink_add_of_const_to_add1:
> ; X32: # %bb.0:
> ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
> ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
> -; X32-NEXT: addl {{[0-9]+}}(%esp), %ecx
> ; X32-NEXT: addl %ecx, %eax
> ; X32-NEXT: addl $32, %eax
> ; X32-NEXT: retl
> ;
> ; X64-LABEL: sink_add_of_const_to_add1:
> ; X64: # %bb.0:
> -; X64-NEXT: # kill: def $edx killed $edx def $rdx
> +; X64-NEXT: # kill: def $esi killed $esi def $rsi
> ; X64-NEXT: # kill: def $edi killed $edi def $rdi
> -; X64-NEXT: addl %esi, %edi
> -; X64-NEXT: leal 32(%rdx,%rdi), %eax
> +; X64-NEXT: leal 32(%rdi,%rsi), %eax
> ; X64-NEXT: retq
> - %t0 = add i32 %a, %b
> - %t1 = add i32 %t0, 32 ; constant always on RHS
> - %r = add i32 %c, %t1
> + %t0 = add i32 %a, 32 ; constant always on RHS
> + %r = add i32 %b, %t0
> ret i32 %r
> }
>
> ; add (sub %x, C), %y
> ; Outer 'add' is commutative - 2 variants.
>
> -define i32 @sink_sub_of_const_to_add0(i32 %a, i32 %b, i32 %c) {
> +define i32 @sink_sub_of_const_to_add0(i32 %a, i32 %b) {
> ; X32-LABEL: sink_sub_of_const_to_add0:
> ; X32: # %bb.0:
> ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
> ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
> -; X32-NEXT: addl {{[0-9]+}}(%esp), %ecx
> ; X32-NEXT: addl %ecx, %eax
> ; X32-NEXT: addl $-32, %eax
> ; X32-NEXT: retl
> ;
> ; X64-LABEL: sink_sub_of_const_to_add0:
> ; X64: # %bb.0:
> -; X64-NEXT: # kill: def $edx killed $edx def $rdx
> +; X64-NEXT: # kill: def $esi killed $esi def $rsi
> ; X64-NEXT: # kill: def $edi killed $edi def $rdi
> -; X64-NEXT: addl %esi, %edi
> -; X64-NEXT: leal -32(%rdx,%rdi), %eax
> +; X64-NEXT: leal -32(%rdi,%rsi), %eax
> ; X64-NEXT: retq
> - %t0 = add i32 %a, %b
> - %t1 = sub i32 %t0, 32
> - %r = add i32 %t1, %c
> + %t0 = sub i32 %a, 32
> + %r = add i32 %t0, %b
> ret i32 %r
> }
> -define i32 @sink_sub_of_const_to_add1(i32 %a, i32 %b, i32 %c) {
> +define i32 @sink_sub_of_const_to_add1(i32 %a, i32 %b) {
> ; X32-LABEL: sink_sub_of_const_to_add1:
> ; X32: # %bb.0:
> ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
> ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
> -; X32-NEXT: addl {{[0-9]+}}(%esp), %ecx
> ; X32-NEXT: addl %ecx, %eax
> ; X32-NEXT: addl $-32, %eax
> ; X32-NEXT: retl
> ;
> ; X64-LABEL: sink_sub_of_const_to_add1:
> ; X64: # %bb.0:
> -; X64-NEXT: # kill: def $edx killed $edx def $rdx
> +; X64-NEXT: # kill: def $esi killed $esi def $rsi
> ; X64-NEXT: # kill: def $edi killed $edi def $rdi
> -; X64-NEXT: addl %esi, %edi
> -; X64-NEXT: leal -32(%rdx,%rdi), %eax
> +; X64-NEXT: leal -32(%rdi,%rsi), %eax
> ; X64-NEXT: retq
> - %t0 = add i32 %a, %b
> - %t1 = sub i32 %t0, 32
> - %r = add i32 %c, %t1
> + %t0 = sub i32 %a, 32
> + %r = add i32 %b, %t0
> ret i32 %r
> }
>
> ; add (sub C, %x), %y
> ; Outer 'add' is commutative - 2 variants.
>
> -define i32 @sink_sub_from_const_to_add0(i32 %a, i32 %b, i32 %c) {
> +define i32 @sink_sub_from_const_to_add0(i32 %a, i32 %b) {
> ; X32-LABEL: sink_sub_from_const_to_add0:
> ; X32: # %bb.0:
> -; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
> -; X32-NEXT: addl {{[0-9]+}}(%esp), %ecx
> ; X32-NEXT: movl $32, %eax
> -; X32-NEXT: subl %ecx, %eax
> +; X32-NEXT: subl {{[0-9]+}}(%esp), %eax
> ; X32-NEXT: addl {{[0-9]+}}(%esp), %eax
> ; X32-NEXT: retl
> ;
> ; X64-LABEL: sink_sub_from_const_to_add0:
> ; X64: # %bb.0:
> -; X64-NEXT: addl %esi, %edi
> ; X64-NEXT: movl $32, %eax
> ; X64-NEXT: subl %edi, %eax
> -; X64-NEXT: addl %edx, %eax
> +; X64-NEXT: addl %esi, %eax
> ; X64-NEXT: retq
> - %t0 = add i32 %a, %b
> - %t1 = sub i32 32, %t0
> - %r = add i32 %t1, %c
> + %t0 = sub i32 32, %a
> + %r = add i32 %t0, %b
> ret i32 %r
> }
> -define i32 @sink_sub_from_const_to_add1(i32 %a, i32 %b, i32 %c) {
> +define i32 @sink_sub_from_const_to_add1(i32 %a, i32 %b) {
> ; X32-LABEL: sink_sub_from_const_to_add1:
> ; X32: # %bb.0:
> -; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
> -; X32-NEXT: addl {{[0-9]+}}(%esp), %ecx
> ; X32-NEXT: movl $32, %eax
> -; X32-NEXT: subl %ecx, %eax
> +; X32-NEXT: subl {{[0-9]+}}(%esp), %eax
> ; X32-NEXT: addl {{[0-9]+}}(%esp), %eax
> ; X32-NEXT: retl
> ;
> ; X64-LABEL: sink_sub_from_const_to_add1:
> ; X64: # %bb.0:
> -; X64-NEXT: addl %esi, %edi
> ; X64-NEXT: movl $32, %eax
> ; X64-NEXT: subl %edi, %eax
> -; X64-NEXT: addl %edx, %eax
> +; X64-NEXT: addl %esi, %eax
> ; X64-NEXT: retq
> - %t0 = add i32 %a, %b
> - %t1 = sub i32 32, %t0
> - %r = add i32 %c, %t1
> + %t0 = sub i32 32, %a
> + %r = add i32 %b, %t0
> ret i32 %r
> }
>
> ; sub (add %x, C), %y
> ; sub %y, (add %x, C)
>
> -define i32 @sink_add_of_const_to_sub(i32 %a, i32 %b, i32 %c) {
> +define i32 @sink_add_of_const_to_sub(i32 %a, i32 %b) {
> ; X32-LABEL: sink_add_of_const_to_sub:
> ; X32: # %bb.0:
> ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
> ; X32-NEXT: subl {{[0-9]+}}(%esp), %eax
> -; X32-NEXT: subl {{[0-9]+}}(%esp), %eax
> ; X32-NEXT: addl $32, %eax
> ; X32-NEXT: retl
> ;
> @@ -164,46 +143,39 @@ define i32 @sink_add_of_const_to_sub(i32
> ; X64: # %bb.0:
> ; X64-NEXT: # kill: def $edi killed $edi def $rdi
> ; X64-NEXT: subl %esi, %edi
> -; X64-NEXT: subl %edx, %edi
> ; X64-NEXT: leal 32(%rdi), %eax
> ; X64-NEXT: retq
> - %t0 = sub i32 %a, %b
> - %t1 = add i32 %t0, 32 ; constant always on RHS
> - %r = sub i32 %t1, %c
> + %t0 = add i32 %a, 32 ; constant always on RHS
> + %r = sub i32 %t0, %b
> ret i32 %r
> }
> -define i32 @sink_add_of_const_to_sub2(i32 %a, i32 %b, i32 %c) {
> +define i32 @sink_add_of_const_to_sub2(i32 %a, i32 %b) {
> ; X32-LABEL: sink_add_of_const_to_sub2:
> ; X32: # %bb.0:
> ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
> -; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
> -; X32-NEXT: subl {{[0-9]+}}(%esp), %ecx
> -; X32-NEXT: addl %ecx, %eax
> +; X32-NEXT: subl {{[0-9]+}}(%esp), %eax
> ; X32-NEXT: addl $-32, %eax
> ; X32-NEXT: retl
> ;
> ; X64-LABEL: sink_add_of_const_to_sub2:
> ; X64: # %bb.0:
> -; X64-NEXT: # kill: def $edx killed $edx def $rdx
> ; X64-NEXT: # kill: def $esi killed $esi def $rsi
> ; X64-NEXT: subl %edi, %esi
> -; X64-NEXT: leal -32(%rdx,%rsi), %eax
> +; X64-NEXT: leal -32(%rsi), %eax
> ; X64-NEXT: retq
> - %t0 = sub i32 %a, %b
> - %t1 = add i32 %t0, 32 ; constant always on RHS
> - %r = sub i32 %c, %t1
> + %t0 = add i32 %a, 32 ; constant always on RHS
> + %r = sub i32 %b, %t0
> ret i32 %r
> }
>
> ; sub (sub %x, C), %y
> ; sub %y, (sub %x, C)
>
> -define i32 @sink_sub_of_const_to_sub(i32 %a, i32 %b, i32 %c) {
> +define i32 @sink_sub_of_const_to_sub(i32 %a, i32 %b) {
> ; X32-LABEL: sink_sub_of_const_to_sub:
> ; X32: # %bb.0:
> ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
> ; X32-NEXT: subl {{[0-9]+}}(%esp), %eax
> -; X32-NEXT: subl {{[0-9]+}}(%esp), %eax
> ; X32-NEXT: addl $-32, %eax
> ; X32-NEXT: retl
> ;
> @@ -211,81 +183,69 @@ define i32 @sink_sub_of_const_to_sub(i32
> ; X64: # %bb.0:
> ; X64-NEXT: # kill: def $edi killed $edi def $rdi
> ; X64-NEXT: subl %esi, %edi
> -; X64-NEXT: subl %edx, %edi
> ; X64-NEXT: leal -32(%rdi), %eax
> ; X64-NEXT: retq
> - %t0 = sub i32 %a, %b
> - %t1 = sub i32 %t0, 32
> - %r = sub i32 %t1, %c
> + %t0 = sub i32 %a, 32
> + %r = sub i32 %t0, %b
> ret i32 %r
> }
> -define i32 @sink_sub_of_const_to_sub2(i32 %a, i32 %b, i32 %c) {
> +define i32 @sink_sub_of_const_to_sub2(i32 %a, i32 %b) {
> ; X32-LABEL: sink_sub_of_const_to_sub2:
> ; X32: # %bb.0:
> -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
> -; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
> -; X32-NEXT: subl {{[0-9]+}}(%esp), %ecx
> -; X32-NEXT: addl %ecx, %eax
> -; X32-NEXT: addl $32, %eax
> +; X32-NEXT: movl $32, %eax
> +; X32-NEXT: subl {{[0-9]+}}(%esp), %eax
> +; X32-NEXT: addl {{[0-9]+}}(%esp), %eax
> ; X32-NEXT: retl
> ;
> ; X64-LABEL: sink_sub_of_const_to_sub2:
> ; X64: # %bb.0:
> -; X64-NEXT: # kill: def $edx killed $edx def $rdx
> -; X64-NEXT: # kill: def $esi killed $esi def $rsi
> -; X64-NEXT: subl %edi, %esi
> -; X64-NEXT: leal 32(%rsi,%rdx), %eax
> +; X64-NEXT: movl $32, %eax
> +; X64-NEXT: subl %edi, %eax
> +; X64-NEXT: addl %esi, %eax
> ; X64-NEXT: retq
> - %t0 = sub i32 %a, %b
> - %t1 = sub i32 %t0, 32
> - %r = sub i32 %c, %t1
> + %t0 = sub i32 %a, 32
> + %r = sub i32 %b, %t0
> ret i32 %r
> }
>
> ; sub (sub C, %x), %y
> ; sub %y, (sub C, %x)
>
> -define i32 @sink_sub_from_const_to_sub(i32 %a, i32 %b, i32 %c) {
> +define i32 @sink_sub_from_const_to_sub(i32 %a, i32 %b) {
> ; X32-LABEL: sink_sub_from_const_to_sub:
> ; X32: # %bb.0:
> -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
> +; X32-NEXT: movl $32, %eax
> ; X32-NEXT: subl {{[0-9]+}}(%esp), %eax
> ; X32-NEXT: subl {{[0-9]+}}(%esp), %eax
> -; X32-NEXT: addl $32, %eax
> ; X32-NEXT: retl
> ;
> ; X64-LABEL: sink_sub_from_const_to_sub:
> ; X64: # %bb.0:
> -; X64-NEXT: # kill: def $esi killed $esi def $rsi
> -; X64-NEXT: subl %edi, %esi
> -; X64-NEXT: subl %edx, %esi
> -; X64-NEXT: leal 32(%rsi), %eax
> +; X64-NEXT: movl $32, %eax
> +; X64-NEXT: subl %edi, %eax
> +; X64-NEXT: subl %esi, %eax
> ; X64-NEXT: retq
> - %t0 = sub i32 %a, %b
> - %t1 = sub i32 32, %t0
> - %r = sub i32 %t1, %c
> + %t0 = sub i32 32, %a
> + %r = sub i32 %t0, %b
> ret i32 %r
> }
> -define i32 @sink_sub_from_const_to_sub2(i32 %a, i32 %b, i32 %c) {
> +define i32 @sink_sub_from_const_to_sub2(i32 %a, i32 %b) {
> ; X32-LABEL: sink_sub_from_const_to_sub2:
> ; X32: # %bb.0:
> ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
> ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
> -; X32-NEXT: subl {{[0-9]+}}(%esp), %ecx
> ; X32-NEXT: addl %ecx, %eax
> ; X32-NEXT: addl $-32, %eax
> ; X32-NEXT: retl
> ;
> ; X64-LABEL: sink_sub_from_const_to_sub2:
> ; X64: # %bb.0:
> -; X64-NEXT: # kill: def $edx killed $edx def $rdx
> +; X64-NEXT: # kill: def $esi killed $esi def $rsi
> ; X64-NEXT: # kill: def $edi killed $edi def $rdi
> -; X64-NEXT: subl %esi, %edi
> -; X64-NEXT: leal -32(%rdi,%rdx), %eax
> +; X64-NEXT: leal -32(%rdi,%rsi), %eax
> ; X64-NEXT: retq
> - %t0 = sub i32 %a, %b
> - %t1 = sub i32 32, %t0
> - %r = sub i32 %c, %t1
> + %t0 = sub i32 32, %a
> + %r = sub i32 %b, %t0
> ret i32 %r
> }
>
> @@ -296,146 +256,126 @@ define i32 @sink_sub_from_const_to_sub2(
> ; add (add %x, C), %y
> ; Outer 'add' is commutative - 2 variants.
>
> -define <4 x i32> @vec_sink_add_of_const_to_add0(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
> +define <4 x i32> @vec_sink_add_of_const_to_add0(<4 x i32> %a, <4 x i32> %b) {
> ; X32-LABEL: vec_sink_add_of_const_to_add0:
> ; X32: # %bb.0:
> -; X32-NEXT: paddd %xmm2, %xmm1
> ; X32-NEXT: paddd %xmm1, %xmm0
> ; X32-NEXT: paddd {{\.LCPI.*}}, %xmm0
> ; X32-NEXT: retl
> ;
> ; X64-LABEL: vec_sink_add_of_const_to_add0:
> ; X64: # %bb.0:
> -; X64-NEXT: paddd %xmm2, %xmm1
> ; X64-NEXT: paddd %xmm1, %xmm0
> ; X64-NEXT: paddd {{.*}}(%rip), %xmm0
> ; X64-NEXT: retq
> - %t0 = add <4 x i32> %a, %b
> - %t1 = add <4 x i32> %t0, <i32 42, i32 24, i32 undef, i32 46> ; constant always on RHS
> - %r = add <4 x i32> %t1, %c
> + %t0 = add <4 x i32> %a, <i32 42, i32 24, i32 undef, i32 46> ; constant always on RHS
> + %r = add <4 x i32> %t0, %b
> ret <4 x i32> %r
> }
> -define <4 x i32> @vec_sink_add_of_const_to_add1(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
> +define <4 x i32> @vec_sink_add_of_const_to_add1(<4 x i32> %a, <4 x i32> %b) {
> ; X32-LABEL: vec_sink_add_of_const_to_add1:
> ; X32: # %bb.0:
> -; X32-NEXT: paddd %xmm2, %xmm1
> ; X32-NEXT: paddd %xmm1, %xmm0
> ; X32-NEXT: paddd {{\.LCPI.*}}, %xmm0
> ; X32-NEXT: retl
> ;
> ; X64-LABEL: vec_sink_add_of_const_to_add1:
> ; X64: # %bb.0:
> -; X64-NEXT: paddd %xmm2, %xmm1
> ; X64-NEXT: paddd %xmm1, %xmm0
> ; X64-NEXT: paddd {{.*}}(%rip), %xmm0
> ; X64-NEXT: retq
> - %t0 = add <4 x i32> %a, %b
> - %t1 = add <4 x i32> %t0, <i32 42, i32 24, i32 undef, i32 46> ; constant always on RHS
> - %r = add <4 x i32> %c, %t1
> + %t0 = add <4 x i32> %a, <i32 42, i32 24, i32 undef, i32 46> ; constant always on RHS
> + %r = add <4 x i32> %b, %t0
> ret <4 x i32> %r
> }
>
> ; add (sub %x, C), %y
> ; Outer 'add' is commutative - 2 variants.
>
> -define <4 x i32> @vec_sink_sub_of_const_to_add0(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
> +define <4 x i32> @vec_sink_sub_of_const_to_add0(<4 x i32> %a, <4 x i32> %b) {
> ; X32-LABEL: vec_sink_sub_of_const_to_add0:
> ; X32: # %bb.0:
> -; X32-NEXT: paddd %xmm2, %xmm1
> ; X32-NEXT: paddd %xmm1, %xmm0
> ; X32-NEXT: psubd {{\.LCPI.*}}, %xmm0
> ; X32-NEXT: retl
> ;
> ; X64-LABEL: vec_sink_sub_of_const_to_add0:
> ; X64: # %bb.0:
> -; X64-NEXT: paddd %xmm2, %xmm1
> ; X64-NEXT: paddd %xmm1, %xmm0
> ; X64-NEXT: psubd {{.*}}(%rip), %xmm0
> ; X64-NEXT: retq
> - %t0 = add <4 x i32> %a, %b
> - %t1 = sub <4 x i32> %t0, <i32 42, i32 24, i32 undef, i32 46>
> - %r = add <4 x i32> %t1, %c
> + %t0 = sub <4 x i32> %a, <i32 42, i32 24, i32 undef, i32 46>
> + %r = add <4 x i32> %t0, %b
> ret <4 x i32> %r
> }
> -define <4 x i32> @vec_sink_sub_of_const_to_add1(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
> +define <4 x i32> @vec_sink_sub_of_const_to_add1(<4 x i32> %a, <4 x i32> %b) {
> ; X32-LABEL: vec_sink_sub_of_const_to_add1:
> ; X32: # %bb.0:
> -; X32-NEXT: paddd %xmm2, %xmm1
> ; X32-NEXT: paddd %xmm1, %xmm0
> ; X32-NEXT: psubd {{\.LCPI.*}}, %xmm0
> ; X32-NEXT: retl
> ;
> ; X64-LABEL: vec_sink_sub_of_const_to_add1:
> ; X64: # %bb.0:
> -; X64-NEXT: paddd %xmm2, %xmm1
> ; X64-NEXT: paddd %xmm1, %xmm0
> ; X64-NEXT: psubd {{.*}}(%rip), %xmm0
> ; X64-NEXT: retq
> - %t0 = add <4 x i32> %a, %b
> - %t1 = sub <4 x i32> %t0, <i32 42, i32 24, i32 undef, i32 46>
> - %r = add <4 x i32> %c, %t1
> + %t0 = sub <4 x i32> %a, <i32 42, i32 24, i32 undef, i32 46>
> + %r = add <4 x i32> %b, %t0
> ret <4 x i32> %r
> }
>
> ; add (sub C, %x), %y
> ; Outer 'add' is commutative - 2 variants.
>
> -define <4 x i32> @vec_sink_sub_from_const_to_add0(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
> +define <4 x i32> @vec_sink_sub_from_const_to_add0(<4 x i32> %a, <4 x i32> %b) {
> ; ALL-LABEL: vec_sink_sub_from_const_to_add0:
> ; ALL: # %bb.0:
> -; ALL-NEXT: paddd %xmm1, %xmm0
> -; ALL-NEXT: movdqa {{.*#+}} xmm1 = <42,24,u,46>
> -; ALL-NEXT: psubd %xmm0, %xmm1
> -; ALL-NEXT: paddd %xmm2, %xmm1
> -; ALL-NEXT: movdqa %xmm1, %xmm0
> +; ALL-NEXT: movdqa {{.*#+}} xmm2 = <42,24,u,46>
> +; ALL-NEXT: psubd %xmm0, %xmm2
> +; ALL-NEXT: paddd %xmm1, %xmm2
> +; ALL-NEXT: movdqa %xmm2, %xmm0
> ; ALL-NEXT: ret{{[l|q]}}
> - %t0 = add <4 x i32> %a, %b
> - %t1 = sub <4 x i32> <i32 42, i32 24, i32 undef, i32 46>, %t0
> - %r = add <4 x i32> %t1, %c
> + %t0 = sub <4 x i32> <i32 42, i32 24, i32 undef, i32 46>, %a
> + %r = add <4 x i32> %t0, %b
> ret <4 x i32> %r
> }
> -define <4 x i32> @vec_sink_sub_from_const_to_add1(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
> +define <4 x i32> @vec_sink_sub_from_const_to_add1(<4 x i32> %a, <4 x i32> %b) {
> ; ALL-LABEL: vec_sink_sub_from_const_to_add1:
> ; ALL: # %bb.0:
> -; ALL-NEXT: paddd %xmm1, %xmm0
> -; ALL-NEXT: movdqa {{.*#+}} xmm1 = <42,24,u,46>
> -; ALL-NEXT: psubd %xmm0, %xmm1
> -; ALL-NEXT: paddd %xmm2, %xmm1
> -; ALL-NEXT: movdqa %xmm1, %xmm0
> +; ALL-NEXT: movdqa {{.*#+}} xmm2 = <42,24,u,46>
> +; ALL-NEXT: psubd %xmm0, %xmm2
> +; ALL-NEXT: paddd %xmm1, %xmm2
> +; ALL-NEXT: movdqa %xmm2, %xmm0
> ; ALL-NEXT: ret{{[l|q]}}
> - %t0 = add <4 x i32> %a, %b
> - %t1 = sub <4 x i32> <i32 42, i32 24, i32 undef, i32 46>, %t0
> - %r = add <4 x i32> %c, %t1
> + %t0 = sub <4 x i32> <i32 42, i32 24, i32 undef, i32 46>, %a
> + %r = add <4 x i32> %b, %t0
> ret <4 x i32> %r
> }
>
> ; sub (add %x, C), %y
> ; sub %y, (add %x, C)
>
> -define <4 x i32> @vec_sink_add_of_const_to_sub(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
> +define <4 x i32> @vec_sink_add_of_const_to_sub(<4 x i32> %a, <4 x i32> %b) {
> ; X32-LABEL: vec_sink_add_of_const_to_sub:
> ; X32: # %bb.0:
> ; X32-NEXT: psubd %xmm1, %xmm0
> -; X32-NEXT: psubd %xmm2, %xmm0
> ; X32-NEXT: paddd {{\.LCPI.*}}, %xmm0
> ; X32-NEXT: retl
> ;
> ; X64-LABEL: vec_sink_add_of_const_to_sub:
> ; X64: # %bb.0:
> ; X64-NEXT: psubd %xmm1, %xmm0
> -; X64-NEXT: psubd %xmm2, %xmm0
> ; X64-NEXT: paddd {{.*}}(%rip), %xmm0
> ; X64-NEXT: retq
> - %t0 = sub <4 x i32> %a, %b
> - %t1 = add <4 x i32> %t0, <i32 42, i32 24, i32 undef, i32 46> ; constant always on RHS
> - %r = sub <4 x i32> %t1, %c
> + %t0 = add <4 x i32> %a, <i32 42, i32 24, i32 undef, i32 46> ; constant always on RHS
> + %r = sub <4 x i32> %t0, %b
> ret <4 x i32> %r
> }
> -define <4 x i32> @vec_sink_add_of_const_to_sub2(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
> +define <4 x i32> @vec_sink_add_of_const_to_sub2(<4 x i32> %a, <4 x i32> %b) {
> ; X32-LABEL: vec_sink_add_of_const_to_sub2:
> ; X32: # %bb.0:
> ; X32-NEXT: psubd %xmm0, %xmm1
> -; X32-NEXT: paddd %xmm2, %xmm1
> ; X32-NEXT: psubd {{\.LCPI.*}}, %xmm1
> ; X32-NEXT: movdqa %xmm1, %xmm0
> ; X32-NEXT: retl
> @@ -443,100 +383,74 @@ define <4 x i32> @vec_sink_add_of_const_
> ; X64-LABEL: vec_sink_add_of_const_to_sub2:
> ; X64: # %bb.0:
> ; X64-NEXT: psubd %xmm0, %xmm1
> -; X64-NEXT: paddd %xmm2, %xmm1
> ; X64-NEXT: psubd {{.*}}(%rip), %xmm1
> ; X64-NEXT: movdqa %xmm1, %xmm0
> ; X64-NEXT: retq
> - %t0 = sub <4 x i32> %a, %b
> - %t1 = add <4 x i32> %t0, <i32 42, i32 24, i32 undef, i32 46> ; constant always on RHS
> - %r = sub <4 x i32> %c, %t1
> + %t0 = add <4 x i32> %a, <i32 42, i32 24, i32 undef, i32 46> ; constant always on RHS
> + %r = sub <4 x i32> %b, %t0
> ret <4 x i32> %r
> }
>
> ; sub (sub %x, C), %y
> ; sub %y, (sub %x, C)
>
> -define <4 x i32> @vec_sink_sub_of_const_to_sub(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
> +define <4 x i32> @vec_sink_sub_of_const_to_sub(<4 x i32> %a, <4 x i32> %b) {
> ; X32-LABEL: vec_sink_sub_of_const_to_sub:
> ; X32: # %bb.0:
> ; X32-NEXT: psubd %xmm1, %xmm0
> -; X32-NEXT: psubd %xmm2, %xmm0
> ; X32-NEXT: psubd {{\.LCPI.*}}, %xmm0
> ; X32-NEXT: retl
> ;
> ; X64-LABEL: vec_sink_sub_of_const_to_sub:
> ; X64: # %bb.0:
> ; X64-NEXT: psubd %xmm1, %xmm0
> -; X64-NEXT: psubd %xmm2, %xmm0
> ; X64-NEXT: psubd {{.*}}(%rip), %xmm0
> ; X64-NEXT: retq
> - %t0 = sub <4 x i32> %a, %b
> - %t1 = sub <4 x i32> %t0, <i32 42, i32 24, i32 undef, i32 46>
> - %r = sub <4 x i32> %t1, %c
> + %t0 = sub <4 x i32> %a, <i32 42, i32 24, i32 undef, i32 46>
> + %r = sub <4 x i32> %t0, %b
> ret <4 x i32> %r
> }
> -define <4 x i32> @vec_sink_sub_of_const_to_sub2(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
> -; X32-LABEL: vec_sink_sub_of_const_to_sub2:
> -; X32: # %bb.0:
> -; X32-NEXT: psubd %xmm0, %xmm1
> -; X32-NEXT: paddd %xmm2, %xmm1
> -; X32-NEXT: paddd {{\.LCPI.*}}, %xmm1
> -; X32-NEXT: movdqa %xmm1, %xmm0
> -; X32-NEXT: retl
> -;
> -; X64-LABEL: vec_sink_sub_of_const_to_sub2:
> -; X64: # %bb.0:
> -; X64-NEXT: psubd %xmm0, %xmm1
> -; X64-NEXT: paddd %xmm2, %xmm1
> -; X64-NEXT: paddd {{.*}}(%rip), %xmm1
> -; X64-NEXT: movdqa %xmm1, %xmm0
> -; X64-NEXT: retq
> - %t0 = sub <4 x i32> %a, %b
> - %t1 = sub <4 x i32> %t0, <i32 42, i32 24, i32 undef, i32 46>
> - %r = sub <4 x i32> %c, %t1
> +define <4 x i32> @vec_sink_sub_of_const_to_sub2(<4 x i32> %a, <4 x i32> %b) {
> +; ALL-LABEL: vec_sink_sub_of_const_to_sub2:
> +; ALL: # %bb.0:
> +; ALL-NEXT: movdqa {{.*#+}} xmm2 = <42,24,u,46>
> +; ALL-NEXT: psubd %xmm0, %xmm2
> +; ALL-NEXT: paddd %xmm1, %xmm2
> +; ALL-NEXT: movdqa %xmm2, %xmm0
> +; ALL-NEXT: ret{{[l|q]}}
> + %t0 = sub <4 x i32> %a, <i32 42, i32 24, i32 undef, i32 46>
> + %r = sub <4 x i32> %b, %t0
> ret <4 x i32> %r
> }
>
> ; sub (sub C, %x), %y
> ; sub %y, (sub C, %x)
>
> -define <4 x i32> @vec_sink_sub_from_const_to_sub(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
> -; X32-LABEL: vec_sink_sub_from_const_to_sub:
> -; X32: # %bb.0:
> -; X32-NEXT: psubd %xmm0, %xmm1
> -; X32-NEXT: psubd %xmm2, %xmm1
> -; X32-NEXT: paddd {{\.LCPI.*}}, %xmm1
> -; X32-NEXT: movdqa %xmm1, %xmm0
> -; X32-NEXT: retl
> -;
> -; X64-LABEL: vec_sink_sub_from_const_to_sub:
> -; X64: # %bb.0:
> -; X64-NEXT: psubd %xmm0, %xmm1
> -; X64-NEXT: psubd %xmm2, %xmm1
> -; X64-NEXT: paddd {{.*}}(%rip), %xmm1
> -; X64-NEXT: movdqa %xmm1, %xmm0
> -; X64-NEXT: retq
> - %t0 = sub <4 x i32> %a, %b
> - %t1 = sub <4 x i32> <i32 42, i32 24, i32 undef, i32 46>, %t0
> - %r = sub <4 x i32> %t1, %c
> +define <4 x i32> @vec_sink_sub_from_const_to_sub(<4 x i32> %a, <4 x i32> %b) {
> +; ALL-LABEL: vec_sink_sub_from_const_to_sub:
> +; ALL: # %bb.0:
> +; ALL-NEXT: movdqa {{.*#+}} xmm2 = <42,24,u,46>
> +; ALL-NEXT: psubd %xmm0, %xmm2
> +; ALL-NEXT: psubd %xmm1, %xmm2
> +; ALL-NEXT: movdqa %xmm2, %xmm0
> +; ALL-NEXT: ret{{[l|q]}}
> + %t0 = sub <4 x i32> <i32 42, i32 24, i32 undef, i32 46>, %a
> + %r = sub <4 x i32> %t0, %b
> ret <4 x i32> %r
> }
> -define <4 x i32> @vec_sink_sub_from_const_to_sub2(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
> +define <4 x i32> @vec_sink_sub_from_const_to_sub2(<4 x i32> %a, <4 x i32> %b) {
> ; X32-LABEL: vec_sink_sub_from_const_to_sub2:
> ; X32: # %bb.0:
> -; X32-NEXT: psubd %xmm1, %xmm0
> -; X32-NEXT: paddd %xmm2, %xmm0
> +; X32-NEXT: paddd %xmm1, %xmm0
> ; X32-NEXT: psubd {{\.LCPI.*}}, %xmm0
> ; X32-NEXT: retl
> ;
> ; X64-LABEL: vec_sink_sub_from_const_to_sub2:
> ; X64: # %bb.0:
> -; X64-NEXT: psubd %xmm1, %xmm0
> -; X64-NEXT: paddd %xmm2, %xmm0
> +; X64-NEXT: paddd %xmm1, %xmm0
> ; X64-NEXT: psubd {{.*}}(%rip), %xmm0
> ; X64-NEXT: retq
> - %t0 = sub <4 x i32> %a, %b
> - %t1 = sub <4 x i32> <i32 42, i32 24, i32 undef, i32 46>, %t0
> - %r = sub <4 x i32> %c, %t1
> + %t0 = sub <4 x i32> <i32 42, i32 24, i32 undef, i32 46>, %a
> + %r = sub <4 x i32> %b, %t0
> ret <4 x i32> %r
> }
>
>
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