[llvm] r362212 - [MIPS GlobalISel] Add detailed tests for lower call
Petar Avramovic via llvm-commits
llvm-commits at lists.llvm.org
Fri May 31 01:40:08 PDT 2019
Author: petar.avramovic
Date: Fri May 31 01:40:08 2019
New Revision: 362212
URL: http://llvm.org/viewvc/llvm-project?rev=362212&view=rev
Log:
[MIPS GlobalISel] Add detailed tests for lower call
Test different operand types of callee and their behavior whether
relocation model is pic or not.
Possible operand types are:
Register (function pointer),
External symbol (used for libcalls e.g. __udivdi3 or memcpy),
Global address.
Global address has different handling depending on relocation model
and linkage type. Register and external symbol do not.
Differential Revision: https://reviews.llvm.org/D62590
Modified:
llvm/trunk/test/CodeGen/Mips/GlobalISel/irtranslator/call.ll
llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/call.ll
Modified: llvm/trunk/test/CodeGen/Mips/GlobalISel/irtranslator/call.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/GlobalISel/irtranslator/call.ll?rev=362212&r1=362211&r2=362212&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/GlobalISel/irtranslator/call.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/GlobalISel/irtranslator/call.ll Fri May 31 01:40:08 2019
@@ -1,10 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
+; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -stop-after=irtranslator -relocation-model=pic -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32_PIC
declare i32 @f(i32 %a, i32 %b);
-define i32 @g(i32 %a0, i32 %a1, i32 %x, i32 %y) {
- ; MIPS32-LABEL: name: g
+define i32 @call_global(i32 %a0, i32 %a1, i32 %x, i32 %y) {
+ ; MIPS32-LABEL: name: call_global
; MIPS32: bb.1.entry:
; MIPS32: liveins: $a0, $a1, $a2, $a3
; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
@@ -20,12 +21,95 @@ define i32 @g(i32 %a0, i32 %a1, i32 %x,
; MIPS32: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY4]], [[COPY4]]
; MIPS32: $v0 = COPY [[ADD]](s32)
; MIPS32: RetRA implicit $v0
+ ; MIPS32_PIC-LABEL: name: call_global
+ ; MIPS32_PIC: bb.1.entry:
+ ; MIPS32_PIC: liveins: $a0, $a1, $a2, $a3, $t9, $v0
+ ; MIPS32_PIC: [[ADDu:%[0-9]+]]:gpr32 = ADDu $v0, $t9
+ ; MIPS32_PIC: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
+ ; MIPS32_PIC: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
+ ; MIPS32_PIC: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
+ ; MIPS32_PIC: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
+ ; MIPS32_PIC: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+ ; MIPS32_PIC: [[GV:%[0-9]+]]:gpr32(p0) = G_GLOBAL_VALUE target-flags(mips-got-call) @f
+ ; MIPS32_PIC: $a0 = COPY [[COPY2]](s32)
+ ; MIPS32_PIC: $a1 = COPY [[COPY3]](s32)
+ ; MIPS32_PIC: $gp = COPY [[ADDu]]
+ ; MIPS32_PIC: JALRPseudo [[GV]](p0), csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $gp, implicit-def $v0
+ ; MIPS32_PIC: [[COPY4:%[0-9]+]]:_(s32) = COPY $v0
+ ; MIPS32_PIC: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+ ; MIPS32_PIC: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY4]], [[COPY4]]
+ ; MIPS32_PIC: $v0 = COPY [[ADD]](s32)
+ ; MIPS32_PIC: RetRA implicit $v0
entry:
%z = call i32 @f(i32 %x, i32 %y)
%doublez = add i32 %z, %z
ret i32 %doublez
}
+define internal i32 @f_with_local_linkage(i32 %x, i32 %y) {
+ ; MIPS32-LABEL: name: f_with_local_linkage
+ ; MIPS32: bb.1.entry:
+ ; MIPS32: liveins: $a0, $a1
+ ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
+ ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
+ ; MIPS32: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY1]], [[COPY]]
+ ; MIPS32: $v0 = COPY [[ADD]](s32)
+ ; MIPS32: RetRA implicit $v0
+ ; MIPS32_PIC-LABEL: name: f_with_local_linkage
+ ; MIPS32_PIC: bb.1.entry:
+ ; MIPS32_PIC: liveins: $a0, $a1
+ ; MIPS32_PIC: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
+ ; MIPS32_PIC: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
+ ; MIPS32_PIC: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY1]], [[COPY]]
+ ; MIPS32_PIC: $v0 = COPY [[ADD]](s32)
+ ; MIPS32_PIC: RetRA implicit $v0
+entry:
+ %add = add i32 %y, %x
+ ret i32 %add
+}
+
+define i32 @call_global_with_local_linkage(i32 %a0, i32 %a1, i32 %x, i32 %y) {
+ ; MIPS32-LABEL: name: call_global_with_local_linkage
+ ; MIPS32: bb.1.entry:
+ ; MIPS32: liveins: $a0, $a1, $a2, $a3
+ ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
+ ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
+ ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
+ ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
+ ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+ ; MIPS32: $a0 = COPY [[COPY2]](s32)
+ ; MIPS32: $a1 = COPY [[COPY3]](s32)
+ ; MIPS32: JAL @f_with_local_linkage, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $v0
+ ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY $v0
+ ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+ ; MIPS32: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY4]], [[COPY4]]
+ ; MIPS32: $v0 = COPY [[ADD]](s32)
+ ; MIPS32: RetRA implicit $v0
+ ; MIPS32_PIC-LABEL: name: call_global_with_local_linkage
+ ; MIPS32_PIC: bb.1.entry:
+ ; MIPS32_PIC: liveins: $a0, $a1, $a2, $a3, $t9, $v0
+ ; MIPS32_PIC: [[ADDu:%[0-9]+]]:gpr32 = ADDu $v0, $t9
+ ; MIPS32_PIC: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
+ ; MIPS32_PIC: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
+ ; MIPS32_PIC: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
+ ; MIPS32_PIC: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
+ ; MIPS32_PIC: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+ ; MIPS32_PIC: [[GV:%[0-9]+]]:gpr32(p0) = G_GLOBAL_VALUE @f_with_local_linkage
+ ; MIPS32_PIC: $a0 = COPY [[COPY2]](s32)
+ ; MIPS32_PIC: $a1 = COPY [[COPY3]](s32)
+ ; MIPS32_PIC: $gp = COPY [[ADDu]]
+ ; MIPS32_PIC: JALRPseudo [[GV]](p0), csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $gp, implicit-def $v0
+ ; MIPS32_PIC: [[COPY4:%[0-9]+]]:_(s32) = COPY $v0
+ ; MIPS32_PIC: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+ ; MIPS32_PIC: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY4]], [[COPY4]]
+ ; MIPS32_PIC: $v0 = COPY [[ADD]](s32)
+ ; MIPS32_PIC: RetRA implicit $v0
+entry:
+ %z = call i32 @f_with_local_linkage(i32 %x, i32 %y)
+ %doublez = add i32 %z, %z
+ ret i32 %doublez
+}
+
define i32 @call_reg(i32 (i32, i32)* %f_ptr, i32 %x, i32 %y) {
; MIPS32-LABEL: name: call_reg
; MIPS32: bb.1.entry:
@@ -41,7 +125,55 @@ define i32 @call_reg(i32 (i32, i32)* %f_
; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; MIPS32: $v0 = COPY [[COPY3]](s32)
; MIPS32: RetRA implicit $v0
+ ; MIPS32_PIC-LABEL: name: call_reg
+ ; MIPS32_PIC: bb.1.entry:
+ ; MIPS32_PIC: liveins: $a0, $a1, $a2
+ ; MIPS32_PIC: [[COPY:%[0-9]+]]:gpr32(p0) = COPY $a0
+ ; MIPS32_PIC: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
+ ; MIPS32_PIC: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
+ ; MIPS32_PIC: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+ ; MIPS32_PIC: $a0 = COPY [[COPY1]](s32)
+ ; MIPS32_PIC: $a1 = COPY [[COPY2]](s32)
+ ; MIPS32_PIC: JALRPseudo [[COPY]](p0), csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $v0
+ ; MIPS32_PIC: [[COPY3:%[0-9]+]]:_(s32) = COPY $v0
+ ; MIPS32_PIC: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+ ; MIPS32_PIC: $v0 = COPY [[COPY3]](s32)
+ ; MIPS32_PIC: RetRA implicit $v0
entry:
%call = call i32 %f_ptr(i32 %x, i32 %y)
ret i32 %call
}
+
+declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture readonly, i32, i1 immarg)
+
+define void @call_symbol(i8* nocapture readonly %src, i8* nocapture %dest, i32 signext %length) {
+ ; MIPS32-LABEL: name: call_symbol
+ ; MIPS32: bb.1.entry:
+ ; MIPS32: liveins: $a0, $a1, $a2
+ ; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
+ ; MIPS32: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1
+ ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
+ ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+ ; MIPS32: $a0 = COPY [[COPY1]](p0)
+ ; MIPS32: $a1 = COPY [[COPY]](p0)
+ ; MIPS32: $a2 = COPY [[COPY2]](s32)
+ ; MIPS32: JAL &memcpy, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit $a2
+ ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+ ; MIPS32: RetRA
+ ; MIPS32_PIC-LABEL: name: call_symbol
+ ; MIPS32_PIC: bb.1.entry:
+ ; MIPS32_PIC: liveins: $a0, $a1, $a2
+ ; MIPS32_PIC: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
+ ; MIPS32_PIC: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1
+ ; MIPS32_PIC: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
+ ; MIPS32_PIC: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
+ ; MIPS32_PIC: $a0 = COPY [[COPY1]](p0)
+ ; MIPS32_PIC: $a1 = COPY [[COPY]](p0)
+ ; MIPS32_PIC: $a2 = COPY [[COPY2]](s32)
+ ; MIPS32_PIC: JAL &memcpy, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit $a2
+ ; MIPS32_PIC: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
+ ; MIPS32_PIC: RetRA
+entry:
+ call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %dest, i8* align 1 %src, i32 %length, i1 false)
+ ret void
+}
Modified: llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/call.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/call.ll?rev=362212&r1=362211&r2=362212&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/call.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/call.ll Fri May 31 01:40:08 2019
@@ -1,10 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32
+; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32
+; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -relocation-model=pic -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32_PIC
declare i32 @f(i32 %a, i32 %b);
-define i32 @g(i32 %a0, i32 %a1, i32 %x, i32 %y) {
-; MIPS32-LABEL: g:
+define i32 @call_global(i32 %a0, i32 %a1, i32 %x, i32 %y) {
+; MIPS32-LABEL: call_global:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: addiu $sp, $sp, -24
; MIPS32-NEXT: .cfi_def_cfa_offset 24
@@ -19,8 +20,168 @@ define i32 @g(i32 %a0, i32 %a1, i32 %x,
; MIPS32-NEXT: addiu $sp, $sp, 24
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: nop
+;
+; MIPS32_PIC-LABEL: call_global:
+; MIPS32_PIC: # %bb.0: # %entry
+; MIPS32_PIC-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32_PIC-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32_PIC-NEXT: addiu $sp, $sp, -24
+; MIPS32_PIC-NEXT: .cfi_def_cfa_offset 24
+; MIPS32_PIC-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32_PIC-NEXT: .cfi_offset 31, -4
+; MIPS32_PIC-NEXT: addu $1, $2, $25
+; MIPS32_PIC-NEXT: lw $25, %call16(f)($1)
+; MIPS32_PIC-NEXT: move $4, $6
+; MIPS32_PIC-NEXT: move $5, $7
+; MIPS32_PIC-NEXT: move $gp, $1
+; MIPS32_PIC-NEXT: jalr $25
+; MIPS32_PIC-NEXT: nop
+; MIPS32_PIC-NEXT: addu $2, $2, $2
+; MIPS32_PIC-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32_PIC-NEXT: addiu $sp, $sp, 24
+; MIPS32_PIC-NEXT: jr $ra
+; MIPS32_PIC-NEXT: nop
entry:
%z = call i32 @f(i32 %x, i32 %y)
%doublez = add i32 %z, %z
ret i32 %doublez
}
+
+define internal i32 @f_with_local_linkage(i32 %x, i32 %y) {
+; MIPS32-LABEL: f_with_local_linkage:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: addu $2, $5, $4
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+;
+; MIPS32_PIC-LABEL: f_with_local_linkage:
+; MIPS32_PIC: # %bb.0: # %entry
+; MIPS32_PIC-NEXT: addu $2, $5, $4
+; MIPS32_PIC-NEXT: jr $ra
+; MIPS32_PIC-NEXT: nop
+entry:
+ %add = add i32 %y, %x
+ ret i32 %add
+}
+
+define i32 @call_global_with_local_linkage(i32 %a0, i32 %a1, i32 %x, i32 %y) {
+; MIPS32-LABEL: call_global_with_local_linkage:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: addiu $sp, $sp, -24
+; MIPS32-NEXT: .cfi_def_cfa_offset 24
+; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: .cfi_offset 31, -4
+; MIPS32-NEXT: move $4, $6
+; MIPS32-NEXT: move $5, $7
+; MIPS32-NEXT: jal f_with_local_linkage
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: addu $2, $2, $2
+; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: addiu $sp, $sp, 24
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+;
+; MIPS32_PIC-LABEL: call_global_with_local_linkage:
+; MIPS32_PIC: # %bb.0: # %entry
+; MIPS32_PIC-NEXT: lui $2, %hi(_gp_disp)
+; MIPS32_PIC-NEXT: addiu $2, $2, %lo(_gp_disp)
+; MIPS32_PIC-NEXT: addiu $sp, $sp, -24
+; MIPS32_PIC-NEXT: .cfi_def_cfa_offset 24
+; MIPS32_PIC-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32_PIC-NEXT: .cfi_offset 31, -4
+; MIPS32_PIC-NEXT: addu $1, $2, $25
+; MIPS32_PIC-NEXT: lw $2, %got(f_with_local_linkage)($1)
+; MIPS32_PIC-NEXT: addiu $25, $2, %lo(f_with_local_linkage)
+; MIPS32_PIC-NEXT: move $4, $6
+; MIPS32_PIC-NEXT: move $5, $7
+; MIPS32_PIC-NEXT: move $gp, $1
+; MIPS32_PIC-NEXT: jalr $25
+; MIPS32_PIC-NEXT: nop
+; MIPS32_PIC-NEXT: addu $2, $2, $2
+; MIPS32_PIC-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32_PIC-NEXT: addiu $sp, $sp, 24
+; MIPS32_PIC-NEXT: jr $ra
+; MIPS32_PIC-NEXT: nop
+entry:
+ %z = call i32 @f_with_local_linkage(i32 %x, i32 %y)
+ %doublez = add i32 %z, %z
+ ret i32 %doublez
+}
+
+define i32 @call_reg(i32 (i32, i32)* %f_ptr, i32 %x, i32 %y) {
+; MIPS32-LABEL: call_reg:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: addiu $sp, $sp, -24
+; MIPS32-NEXT: .cfi_def_cfa_offset 24
+; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: .cfi_offset 31, -4
+; MIPS32-NEXT: sw $4, 16($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: move $4, $5
+; MIPS32-NEXT: move $5, $6
+; MIPS32-NEXT: lw $25, 16($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: jalr $25
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: addiu $sp, $sp, 24
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+;
+; MIPS32_PIC-LABEL: call_reg:
+; MIPS32_PIC: # %bb.0: # %entry
+; MIPS32_PIC-NEXT: addiu $sp, $sp, -24
+; MIPS32_PIC-NEXT: .cfi_def_cfa_offset 24
+; MIPS32_PIC-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32_PIC-NEXT: .cfi_offset 31, -4
+; MIPS32_PIC-NEXT: sw $4, 16($sp) # 4-byte Folded Spill
+; MIPS32_PIC-NEXT: move $4, $5
+; MIPS32_PIC-NEXT: move $5, $6
+; MIPS32_PIC-NEXT: lw $25, 16($sp) # 4-byte Folded Reload
+; MIPS32_PIC-NEXT: jalr $25
+; MIPS32_PIC-NEXT: nop
+; MIPS32_PIC-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32_PIC-NEXT: addiu $sp, $sp, 24
+; MIPS32_PIC-NEXT: jr $ra
+; MIPS32_PIC-NEXT: nop
+entry:
+ %call = call i32 %f_ptr(i32 %x, i32 %y)
+ ret i32 %call
+}
+
+declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture readonly, i32, i1 immarg)
+
+define void @call_symbol(i8* nocapture readonly %src, i8* nocapture %dest, i32 signext %length) {
+; MIPS32-LABEL: call_symbol:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: addiu $sp, $sp, -24
+; MIPS32-NEXT: .cfi_def_cfa_offset 24
+; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: .cfi_offset 31, -4
+; MIPS32-NEXT: sw $4, 16($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: move $4, $5
+; MIPS32-NEXT: lw $5, 16($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: jal memcpy
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: addiu $sp, $sp, 24
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+;
+; MIPS32_PIC-LABEL: call_symbol:
+; MIPS32_PIC: # %bb.0: # %entry
+; MIPS32_PIC-NEXT: addiu $sp, $sp, -24
+; MIPS32_PIC-NEXT: .cfi_def_cfa_offset 24
+; MIPS32_PIC-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
+; MIPS32_PIC-NEXT: .cfi_offset 31, -4
+; MIPS32_PIC-NEXT: sw $4, 16($sp) # 4-byte Folded Spill
+; MIPS32_PIC-NEXT: move $4, $5
+; MIPS32_PIC-NEXT: lw $5, 16($sp) # 4-byte Folded Reload
+; MIPS32_PIC-NEXT: jal memcpy
+; MIPS32_PIC-NEXT: nop
+; MIPS32_PIC-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
+; MIPS32_PIC-NEXT: addiu $sp, $sp, 24
+; MIPS32_PIC-NEXT: jr $ra
+; MIPS32_PIC-NEXT: nop
+entry:
+ call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %dest, i8* align 1 %src, i32 %length, i1 false)
+ ret void
+}
More information about the llvm-commits
mailing list