[PATCH] D62683: [ARM][FIX] Ran out of registers due tail recursion

Diogo N. Sampaio via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri May 31 01:11:39 PDT 2019


dnsampaio added inline comments.


================
Comment at: lib/Target/ARM/ARMISelLowering.cpp:1888
   // These operations are automatically eliminated by the prolog/epilog pass
-  if (!isSibCall)
+  else
     Chain = DAG.getCALLSEQ_START(Chain, NumBytes, 0, dl);
----------------
dmgreen wrote:
> dmgreen wrote:
> > This looks like an unrelated change (and a little harder to parse to me, with the comment and newly between the if and the else).
> Also, is isSibCall ever different to isTailCall? Do we need both?
Indeed it is not used. Will do a little of clean up as well by removing it.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D62683/new/

https://reviews.llvm.org/D62683





More information about the llvm-commits mailing list