[llvm] r362197 - [X86] Add test case for PR42079. NFC

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Thu May 30 23:21:45 PDT 2019


Author: ctopper
Date: Thu May 30 23:21:45 2019
New Revision: 362197

URL: http://llvm.org/viewvc/llvm-project?rev=362197&view=rev
Log:
[X86] Add test case for PR42079. NFC

Modified:
    llvm/trunk/test/CodeGen/X86/vec_fpext.ll

Modified: llvm/trunk/test/CodeGen/X86/vec_fpext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_fpext.ll?rev=362197&r1=362196&r2=362197&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_fpext.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_fpext.ll Thu May 30 23:21:45 2019
@@ -298,3 +298,48 @@ entry:
   %2  = fpext <2 x float> %1 to <2 x double>
   ret <2 x double> %2
 }
+
+; Make sure we don't narrow a volatile load.
+; FIXME: We incorrectly narrow it for avx512vl.
+define <2 x double> @PR42079(<4 x float>* %x) {
+; X32-SSE-LABEL: PR42079:
+; X32-SSE:       # %bb.0:
+; X32-SSE-NEXT:    movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X32-SSE-NEXT:    movaps (%eax), %xmm0 # encoding: [0x0f,0x28,0x00]
+; X32-SSE-NEXT:    cvtps2pd %xmm0, %xmm0 # encoding: [0x0f,0x5a,0xc0]
+; X32-SSE-NEXT:    retl # encoding: [0xc3]
+;
+; X32-AVX-LABEL: PR42079:
+; X32-AVX:       # %bb.0:
+; X32-AVX-NEXT:    movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X32-AVX-NEXT:    vmovaps (%eax), %xmm0 # encoding: [0xc5,0xf8,0x28,0x00]
+; X32-AVX-NEXT:    vcvtps2pd %xmm0, %xmm0 # encoding: [0xc5,0xf8,0x5a,0xc0]
+; X32-AVX-NEXT:    retl # encoding: [0xc3]
+;
+; X32-AVX512VL-LABEL: PR42079:
+; X32-AVX512VL:       # %bb.0:
+; X32-AVX512VL-NEXT:    movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X32-AVX512VL-NEXT:    vcvtps2pd (%eax), %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x5a,0x00]
+; X32-AVX512VL-NEXT:    retl # encoding: [0xc3]
+;
+; X64-SSE-LABEL: PR42079:
+; X64-SSE:       # %bb.0:
+; X64-SSE-NEXT:    movaps (%rdi), %xmm0 # encoding: [0x0f,0x28,0x07]
+; X64-SSE-NEXT:    cvtps2pd %xmm0, %xmm0 # encoding: [0x0f,0x5a,0xc0]
+; X64-SSE-NEXT:    retq # encoding: [0xc3]
+;
+; X64-AVX-LABEL: PR42079:
+; X64-AVX:       # %bb.0:
+; X64-AVX-NEXT:    vmovaps (%rdi), %xmm0 # encoding: [0xc5,0xf8,0x28,0x07]
+; X64-AVX-NEXT:    vcvtps2pd %xmm0, %xmm0 # encoding: [0xc5,0xf8,0x5a,0xc0]
+; X64-AVX-NEXT:    retq # encoding: [0xc3]
+;
+; X64-AVX512VL-LABEL: PR42079:
+; X64-AVX512VL:       # %bb.0:
+; X64-AVX512VL-NEXT:    vcvtps2pd (%rdi), %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x5a,0x07]
+; X64-AVX512VL-NEXT:    retq # encoding: [0xc3]
+  %a = load volatile <4 x float>, <4 x float>* %x
+  %b = shufflevector <4 x float> %a, <4 x float> %a, <2 x i32> <i32 0, i32 1>
+  %c = fpext <2 x float> %b to <2 x double>
+  ret <2 x double> %c
+}




More information about the llvm-commits mailing list