[PATCH] D62713: [MIR-Canon] Hardening propagateLocalCopies.

[Puyan Lotfi via Phabricator via llvm-commits]

plotfi updated this revision to Diff 202364.
plotfi added a comment.

test case enhancement


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D62713/new/

https://reviews.llvm.org/D62713

Files:
  llvm/lib/CodeGen/MIRCanonicalizerPass.cpp
  llvm/test/CodeGen/MIR/AMDGPU/mir-canon-multi.mir


Index: llvm/test/CodeGen/MIR/AMDGPU/mir-canon-multi.mir
===================================================================
--- llvm/test/CodeGen/MIR/AMDGPU/mir-canon-multi.mir
+++ llvm/test/CodeGen/MIR/AMDGPU/mir-canon-multi.mir
@@ -1,8 +1,13 @@
 # RUN: llc -o -  -march=amdgcn  -run-pass mir-canonicalizer  -x mir %s | FileCheck %s
 
+# CHECK: %namedVReg4354:vgpr_32 = COPY $vgpr0
 # CHECK: %namedVReg1352:vgpr_32 = COPY %namedVReg4353
-# CHECK: %namedVReg1359:vgpr_32 = COPY %namedVReg1362
-# CHECK: %namedVReg1360:vgpr_32 = COPY %namedVReg1363
+# CHECK-NEXT: %namedVReg1358:vgpr_32 = COPY %namedVReg1361
+# CHECK-NEXT: %namedVReg1359:vgpr_32 = COPY %namedVReg1362
+# CHECK-NEXT: %namedVReg1353:vreg_64 = REG_SEQUENCE %namedVReg4354, %subreg.sub0, %namedVReg1352, %subreg.sub1
+# CHECK-NEXT: %namedVReg1354:sgpr_128 = REG_SEQUENCE %namedVReg4354, %subreg.sub0, %namedVReg1352, %subreg.sub1, %namedVReg1358, %subreg.sub2, %namedVReg1359, %subreg.sub3
+# This tests for the itereator invalidation fix (reviews.llvm.org/D62713)
+# CHECK-NEXT: BUFFER_STORE_DWORD_ADDR64 %namedVReg1352, %namedVReg1353, %namedVReg1354, 0, 0, 0, 0, 0, 0, implicit $exec
 ...
 ---
 name: foo
Index: llvm/lib/CodeGen/MIRCanonicalizerPass.cpp
===================================================================
--- llvm/lib/CodeGen/MIRCanonicalizerPass.cpp
+++ llvm/lib/CodeGen/MIRCanonicalizerPass.cpp
@@ -343,15 +343,23 @@
       continue;
     if (!TargetRegisterInfo::isVirtualRegister(Src))
       continue;
+    // Not folding COPY instructions if regbankselect has not set the RCs.
+    // Why are we only considering Register Classes? Because the verifier
+    // sometimes gets upset if the register classes don't match even if the
+    // types do. A future patch might add COPY folding for matching types in
+    // pre-registerbankselect code.
+    if (!MRI.getRegClassOrNull(Dst))
+      continue;
     if (MRI.getRegClass(Dst) != MRI.getRegClass(Src))
       continue;
 
-    for (auto UI = MRI.use_begin(Dst); UI != MRI.use_end(); ++UI) {
-      MachineOperand *MO = &*UI;
+    std::vector<MachineOperand *> Uses;
+    for (auto UI = MRI.use_begin(Dst); UI != MRI.use_end(); ++UI)
+      Uses.push_back(&*UI);
+    for (auto *MO : Uses)
       MO->setReg(Src);
-      Changed = true;
-    }
 
+    Changed = true;
     MI->eraseFromParent();
   }
 


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