[PATCH] D62685: [RISCV] Add pseudo instruction for calls with explicit register
Lewis Revill via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 30 08:57:45 PDT 2019
lewis-revill created this revision.
lewis-revill added reviewers: asb, simoncook, edward-jones.
Herald added subscribers: llvm-commits, benna, psnobl, jocewei, PkmX, rkruppe, the_o, brucehoult, MartinMosbeck, rogfer01, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, apazos, johnrusso, rbar.
Herald added a project: LLVM.
This patch adds the PseudoCALLReg instruction which allows using an explicit register operand as the destination for the return address.
GCC can successfully parse this form of the call instruction, which would be used for calls to functions which do not use `ra` as the return address register, such as the `__riscv_save` libcalls. This patch forms the first part of an implementation of `-msave-restore` for RISC-V.
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