[PATCH] D62664: [DAGCombine] (A+C1)-C2 -> A+(C1-C2) constant-fold
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 30 07:15:04 PDT 2019
lebedev.ri created this revision.
lebedev.ri added reviewers: RKSimon, craig.topper, spatel.
lebedev.ri added a project: LLVM.
Herald added a subscriber: javed.absar.
Direct sibling of D62662 <https://reviews.llvm.org/D62662>, the root cause of the endless combine loop in D62257 <https://reviews.llvm.org/D62257>
https://rise4fun.com/Alive/d3W
Repository:
rL LLVM
https://reviews.llvm.org/D62664
Files:
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
test/CodeGen/AArch64/vec_add.ll
test/CodeGen/X86/vec_add.ll
Index: test/CodeGen/X86/vec_add.ll
===================================================================
--- test/CodeGen/X86/vec_add.ll
+++ test/CodeGen/X86/vec_add.ll
@@ -53,11 +53,13 @@
; X86: # %bb.0:
; X86-NEXT: subl $28, %esp
; X86-NEXT: .cfi_def_cfa_offset 32
-; X86-NEXT: paddd {{\.LCPI.*}}, %xmm0
+; X86-NEXT: movdqa %xmm0, %xmm1
; X86-NEXT: movdqu %xmm0, (%esp) # 16-byte Spill
+; X86-NEXT: movdqa {{.*#+}} xmm0 = [8,8,8,8]
+; X86-NEXT: paddd %xmm1, %xmm0
; X86-NEXT: calll use
; X86-NEXT: movdqu (%esp), %xmm0 # 16-byte Reload
-; X86-NEXT: psubd {{\.LCPI.*}}, %xmm0
+; X86-NEXT: paddd {{\.LCPI.*}}, %xmm0
; X86-NEXT: addl $28, %esp
; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl
@@ -66,11 +68,13 @@
; X64: # %bb.0:
; X64-NEXT: subq $24, %rsp
; X64-NEXT: .cfi_def_cfa_offset 32
-; X64-NEXT: paddd {{.*}}(%rip), %xmm0
+; X64-NEXT: movdqa %xmm0, %xmm1
; X64-NEXT: movdqa %xmm0, (%rsp) # 16-byte Spill
+; X64-NEXT: movdqa {{.*#+}} xmm0 = [8,8,8,8]
+; X64-NEXT: paddd %xmm1, %xmm0
; X64-NEXT: callq use
; X64-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
-; X64-NEXT: psubd {{.*}}(%rip), %xmm0
+; X64-NEXT: paddd {{.*}}(%rip), %xmm0
; X64-NEXT: addq $24, %rsp
; X64-NEXT: .cfi_def_cfa_offset 8
; X64-NEXT: retq
Index: test/CodeGen/AArch64/vec_add.ll
===================================================================
--- test/CodeGen/AArch64/vec_add.ll
+++ test/CodeGen/AArch64/vec_add.ll
@@ -42,13 +42,13 @@
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: .cfi_offset w30, -16
; CHECK-NEXT: movi v1.4s, #8
-; CHECK-NEXT: add v0.4s, v0.4s, v1.4s
; CHECK-NEXT: str q0, [sp] // 16-byte Folded Spill
+; CHECK-NEXT: add v0.4s, v0.4s, v1.4s
; CHECK-NEXT: bl use
; CHECK-NEXT: ldr q1, [sp] // 16-byte Folded Reload
; CHECK-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
-; CHECK-NEXT: mvni v0.4s, #1
-; CHECK-NEXT: sub v0.4s, v1.4s, v0.4s
+; CHECK-NEXT: movi v0.4s, #10
+; CHECK-NEXT: add v0.4s, v1.4s, v0.4s
; CHECK-NEXT: add sp, sp, #32 // =32
; CHECK-NEXT: ret
%t0 = add <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>
Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -2870,6 +2870,16 @@
if (N0.getOpcode() == ISD::ADD && N0.getOperand(1) == N1)
return N0.getOperand(0);
+ // fold (A+C1)-C2 -> A+(C1-C2)
+ if (N0.getOpcode() == ISD::ADD &&
+ isConstantOrConstantVector(N1, /* NoOpaques */ true) &&
+ isConstantOrConstantVector(N0.getOperand(1), /* NoOpaques */ true)) {
+ SDValue NewC = DAG.FoldConstantArithmetic(
+ ISD::SUB, DL, VT, N0.getOperand(1).getNode(), N1.getNode());
+ assert(NewC && "Constant folding failed");
+ return DAG.getNode(ISD::ADD, DL, VT, N0.getOperand(0), NewC);
+ }
+
// fold C2-(A+C1) -> (C2-C1)-A
if (N1.getOpcode() == ISD::ADD) {
SDValue N11 = N1.getOperand(1);
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