[PATCH] D60694: [ARM] Introduce separate features for FP registers.

[Oliver Stannard (Linaro) via Phabricator via llvm-commits]

ostannard accepted this revision.
ostannard added a comment.
This revision is now accepted and ready to land.

LGTM with one nit.



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Comment at: test/MC/ARM/mve-vmov-lane.s:3
+
+// v8.1M added the Q register syntax for this instruction. The v8.1M spec does
+// not list the D register syntax as valid, but we accept it as an extension to
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This comment isn't true yet, we should probably move this whole file to the patch which adds the v8.1M syntax change.


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Comment at: test/MC/Disassembler/ARM/mve-vmov-lane.txt:4
+
+# The disassembly for this instruction varies between v8.1M and other
+# architectures. In v8.1M (with either scalar floating point, MVE or both), we
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Again, this isn't true yet, I think it'd be better to move the whole file to a later patch.


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https://reviews.llvm.org/D60694