[PATCH] D62608: [ARM64, COFF] Add CodeView register mapping

[Tom Tan via Phabricator via llvm-commits]

TomTan added a comment.

In D62608#1522078 <https://reviews.llvm.org/D62608#1522078>, @rnk wrote:

> In D62608#1521945 <https://reviews.llvm.org/D62608#1521945>, @efriedma wrote:
>
> > The code looks fine now.  I'm okay with putting off fixes for dumping code that incorrectly assumes x86.
>
>
> The dumping tools are the foundation of our testing strategy, so I think we should take the time to fix them early on. It should be a matter of changing `getRegisterNames` to accept a CPU type, switch, and return the appropriate (x86 or arm) enum table, maybe just returning x86 by default to preserve existing behavior. Both symbol dumpers already store the compilation CPU type from the S_COMPILE3 record, so this shouldn't be too complicated.


Yes, I was thinking on passing CPU arch (as you mentioned from S_COMPILE3) to get correct register name. I am trying to find a way in each include site of "CodeViewRegisters.def" to get that information. At the mean time, the current issue affects debugging experience on Chromium and derived projects. As register name query only affects LLVM pdb tools, could this change be merged at first while I am working on fixing LLVM pdb tool? Also ARM64 support for LLVM pdb tool is new, so it would not block anything or test.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D62608/new/

https://reviews.llvm.org/D62608