[PATCH] D62519: AMDGPU: Don't enable all lanes with non-CSR VGPR spills

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 29 11:19:02 PDT 2019

Previous message: [PATCH] D62519: AMDGPU: Don't enable all lanes with non-CSR VGPR spills
Next message: [PATCH] D62520: [llvm-readobj/llvm-readelf] - Implement GNU style dumper of the SHT_GNU_verdef section.
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

rampitec added a comment.

JBTW, strictly speaking you do not need a full wave and 256 bytes of scratch loads and stores per VGPR. Only first min(wavefrontsize, # of SGPRs spilled) lanes are needed.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D62519/new/

https://reviews.llvm.org/D62519

Previous message: [PATCH] D62519: AMDGPU: Don't enable all lanes with non-CSR VGPR spills
Next message: [PATCH] D62520: [llvm-readobj/llvm-readelf] - Implement GNU style dumper of the SHT_GNU_verdef section.
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list