[PATCH] D62006: Add "llvm_unreachable" for function RegisterBankInfo::getRegBank

[Pengfei Wang via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG818c65264341: [X86] Use 'llvm_unreachable' instead of nullptr in unreachable code to avoid… (authored by pengfei).
Herald added a subscriber: hiraditya.

Changed prior to commit:
  https://reviews.llvm.org/D62006?vs=200381&id=201810#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D62006/new/

https://reviews.llvm.org/D62006

Files:
  llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
  llvm/lib/Target/X86/X86InstructionSelector.cpp


Index: llvm/lib/Target/X86/X86InstructionSelector.cpp
===================================================================
--- llvm/lib/Target/X86/X86InstructionSelector.cpp
+++ llvm/lib/Target/X86/X86InstructionSelector.cpp
@@ -1610,8 +1610,8 @@
   assert(RegTy == MRI.getType(Op1Reg) && RegTy == MRI.getType(Op2Reg) &&
          "Arguments and return value types must match");
 
-  const RegisterBank *RegRB = RBI.getRegBank(DstReg, MRI, TRI);
-  if (!RegRB || RegRB->getID() != X86::GPRRegBankID)
+  const RegisterBank &RegRB = *RBI.getRegBank(DstReg, MRI, TRI);
+  if (RegRB.getID() != X86::GPRRegBankID)
     return false;
 
   const static unsigned NumTypes = 4; // i8, i16, i32, i64
@@ -1709,7 +1709,7 @@
   const DivRemEntry &TypeEntry = *OpEntryIt;
   const DivRemEntry::DivRemResult &OpEntry = TypeEntry.ResultTable[OpIndex];
 
-  const TargetRegisterClass *RegRC = getRegClass(RegTy, *RegRB);
+  const TargetRegisterClass *RegRC = getRegClass(RegTy, RegRB);
   if (!RBI.constrainGenericRegister(Op1Reg, *RegRC, MRI) ||
       !RBI.constrainGenericRegister(Op2Reg, *RegRC, MRI) ||
       !RBI.constrainGenericRegister(DstReg, *RegRC, MRI)) {
Index: llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
===================================================================
--- llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
+++ llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
@@ -91,7 +91,9 @@
     return RB;
   if (auto *RC = RegClassOrBank.dyn_cast<const TargetRegisterClass *>())
     return &getRegBankFromRegClass(*RC);
-  return nullptr;
+
+  llvm_unreachable("RegClassOrBank is either a const RegisterBank* or "
+                   "a const TargetRegisterClass*");
 }
 
 const TargetRegisterClass &


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