[PATCH] D62537: [AMDGPU] Correct the handling of inlineasm output registers.

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/inline-asm.ll:289
+false:
+  %s0 = tail call { i64, i64 } asm sideeffect "v_mad_u64_u32 $0, $1, $2, $3, $4", "=v,=s,r,v,v"(i32 -766435501, i32 %x, i64 0)
+  br label %exit
----------------
Can you not use "r" here?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D62537/new/

https://reviews.llvm.org/D62537