[PATCH] D62392: [DAGCombine][ARM] (sub Carry, X) -> (addcarry (sub 0, X), 0, Carry) fold
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat May 25 13:48:36 PDT 2019
lebedev.ri added a comment.
In D62392#1516927 <https://reviews.llvm.org/D62392#1516927>, @efriedma wrote:
> I mean, we basically need two methods: getAsAddCarry (carry produced by UADDO/ADDCARRY) and getAsSubCarry (carry produced by USUBO/SUBCARRY), depending on how you're planning to use the carry bit, so we don't end up with same sort of mismatch we ran into before on ARM.
Thank you for the explanation.
Is that required to be part of the follow-up fixes for D62266 <https://reviews.llvm.org/D62266>?
It sounds, while not unrelated, not exactly specific to the regressions there.
I don't know much about these 'carry' ops, so unless it's required to
fix those regressions, it might not be best for me to look into that..
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