[llvm] r361702 - [X86][SSE] vector-sext - cleanup prefix lists

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Sat May 25 09:33:18 PDT 2019


Author: rksimon
Date: Sat May 25 09:33:17 2019
New Revision: 361702

URL: http://llvm.org/viewvc/llvm-project?rev=361702&view=rev
Log:
[X86][SSE] vector-sext - cleanup prefix lists

Add X32-SSE common prefix to merge some checks

Modified:
    llvm/trunk/test/CodeGen/X86/vector-sext-widen.ll
    llvm/trunk/test/CodeGen/X86/vector-sext.ll

Modified: llvm/trunk/test/CodeGen/X86/vector-sext-widen.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-sext-widen.ll?rev=361702&r1=361701&r2=361702&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-sext-widen.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-sext-widen.ll Sat May 25 09:33:17 2019
@@ -1,15 +1,15 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -x86-experimental-vector-widening-legalization -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
-; RUN: llc < %s -x86-experimental-vector-widening-legalization -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3
-; RUN: llc < %s -x86-experimental-vector-widening-legalization -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
-; RUN: llc < %s -x86-experimental-vector-widening-legalization -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -x86-experimental-vector-widening-legalization -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
-; RUN: llc < %s -x86-experimental-vector-widening-legalization -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512F
-; RUN: llc < %s -x86-experimental-vector-widening-legalization -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512BW
+; RUN: llc < %s -x86-experimental-vector-widening-legalization -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc < %s -x86-experimental-vector-widening-legalization -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSSE3
+; RUN: llc < %s -x86-experimental-vector-widening-legalization -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc < %s -x86-experimental-vector-widening-legalization -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc < %s -x86-experimental-vector-widening-legalization -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc < %s -x86-experimental-vector-widening-legalization -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
+; RUN: llc < %s -x86-experimental-vector-widening-legalization -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BW
 ;
 ; Just two 32-bit runs to make sure we do reasonable things there.
-; RUN: llc < %s -x86-experimental-vector-widening-legalization -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X32-SSE2
-; RUN: llc < %s -x86-experimental-vector-widening-legalization -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X32-SSE41
+; RUN: llc < %s -x86-experimental-vector-widening-legalization -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X32-SSE,X32-SSE2
+; RUN: llc < %s -x86-experimental-vector-widening-legalization -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=X32-SSE,X32-SSE41
 
 define <8 x i16> @sext_16i8_to_8i16(<16 x i8> %A) nounwind uwtable readnone ssp {
 ; SSE2-LABEL: sext_16i8_to_8i16:
@@ -5795,41 +5795,23 @@ define <32 x i8> @sext_32xi1_to_32xi8(<3
 ; AVX512BW-NEXT:    # kill: def $ymm0 killed $ymm0 killed $zmm0
 ; AVX512BW-NEXT:    retq
 ;
-; X32-SSE2-LABEL: sext_32xi1_to_32xi8:
-; X32-SSE2:       # %bb.0:
-; X32-SSE2-NEXT:    pushl %ebp
-; X32-SSE2-NEXT:    movl %esp, %ebp
-; X32-SSE2-NEXT:    andl $-16, %esp
-; X32-SSE2-NEXT:    subl $16, %esp
-; X32-SSE2-NEXT:    movdqa 8(%ebp), %xmm3
-; X32-SSE2-NEXT:    pcmpeqw 40(%ebp), %xmm1
-; X32-SSE2-NEXT:    pcmpeqw 24(%ebp), %xmm0
-; X32-SSE2-NEXT:    packsswb %xmm1, %xmm0
-; X32-SSE2-NEXT:    pcmpeqw 72(%ebp), %xmm3
-; X32-SSE2-NEXT:    pcmpeqw 56(%ebp), %xmm2
-; X32-SSE2-NEXT:    packsswb %xmm3, %xmm2
-; X32-SSE2-NEXT:    movdqa %xmm2, %xmm1
-; X32-SSE2-NEXT:    movl %ebp, %esp
-; X32-SSE2-NEXT:    popl %ebp
-; X32-SSE2-NEXT:    retl
-;
-; X32-SSE41-LABEL: sext_32xi1_to_32xi8:
-; X32-SSE41:       # %bb.0:
-; X32-SSE41-NEXT:    pushl %ebp
-; X32-SSE41-NEXT:    movl %esp, %ebp
-; X32-SSE41-NEXT:    andl $-16, %esp
-; X32-SSE41-NEXT:    subl $16, %esp
-; X32-SSE41-NEXT:    movdqa 8(%ebp), %xmm3
-; X32-SSE41-NEXT:    pcmpeqw 40(%ebp), %xmm1
-; X32-SSE41-NEXT:    pcmpeqw 24(%ebp), %xmm0
-; X32-SSE41-NEXT:    packsswb %xmm1, %xmm0
-; X32-SSE41-NEXT:    pcmpeqw 72(%ebp), %xmm3
-; X32-SSE41-NEXT:    pcmpeqw 56(%ebp), %xmm2
-; X32-SSE41-NEXT:    packsswb %xmm3, %xmm2
-; X32-SSE41-NEXT:    movdqa %xmm2, %xmm1
-; X32-SSE41-NEXT:    movl %ebp, %esp
-; X32-SSE41-NEXT:    popl %ebp
-; X32-SSE41-NEXT:    retl
+; X32-SSE-LABEL: sext_32xi1_to_32xi8:
+; X32-SSE:       # %bb.0:
+; X32-SSE-NEXT:    pushl %ebp
+; X32-SSE-NEXT:    movl %esp, %ebp
+; X32-SSE-NEXT:    andl $-16, %esp
+; X32-SSE-NEXT:    subl $16, %esp
+; X32-SSE-NEXT:    movdqa 8(%ebp), %xmm3
+; X32-SSE-NEXT:    pcmpeqw 40(%ebp), %xmm1
+; X32-SSE-NEXT:    pcmpeqw 24(%ebp), %xmm0
+; X32-SSE-NEXT:    packsswb %xmm1, %xmm0
+; X32-SSE-NEXT:    pcmpeqw 72(%ebp), %xmm3
+; X32-SSE-NEXT:    pcmpeqw 56(%ebp), %xmm2
+; X32-SSE-NEXT:    packsswb %xmm3, %xmm2
+; X32-SSE-NEXT:    movdqa %xmm2, %xmm1
+; X32-SSE-NEXT:    movl %ebp, %esp
+; X32-SSE-NEXT:    popl %ebp
+; X32-SSE-NEXT:    retl
   %a = icmp eq <32 x i16> %c1, %c2
   %b = sext <32 x i1> %a to <32 x i8>
   ret <32 x i8> %b

Modified: llvm/trunk/test/CodeGen/X86/vector-sext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-sext.ll?rev=361702&r1=361701&r2=361702&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-sext.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-sext.ll Sat May 25 09:33:17 2019
@@ -1,15 +1,15 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512BW
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSSE3
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BW
 ;
 ; Just two 32-bit runs to make sure we do reasonable things there.
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X32-SSE2
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X32-SSE41
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X32-SSE,X32-SSE2
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=X32-SSE,X32-SSE41
 
 define <8 x i16> @sext_16i8_to_8i16(<16 x i8> %A) nounwind uwtable readnone ssp {
 ; SSE2-LABEL: sext_16i8_to_8i16:
@@ -5816,41 +5816,23 @@ define <32 x i8> @sext_32xi1_to_32xi8(<3
 ; AVX512BW-NEXT:    # kill: def $ymm0 killed $ymm0 killed $zmm0
 ; AVX512BW-NEXT:    retq
 ;
-; X32-SSE2-LABEL: sext_32xi1_to_32xi8:
-; X32-SSE2:       # %bb.0:
-; X32-SSE2-NEXT:    pushl %ebp
-; X32-SSE2-NEXT:    movl %esp, %ebp
-; X32-SSE2-NEXT:    andl $-16, %esp
-; X32-SSE2-NEXT:    subl $16, %esp
-; X32-SSE2-NEXT:    movdqa 8(%ebp), %xmm3
-; X32-SSE2-NEXT:    pcmpeqw 40(%ebp), %xmm1
-; X32-SSE2-NEXT:    pcmpeqw 24(%ebp), %xmm0
-; X32-SSE2-NEXT:    packsswb %xmm1, %xmm0
-; X32-SSE2-NEXT:    pcmpeqw 72(%ebp), %xmm3
-; X32-SSE2-NEXT:    pcmpeqw 56(%ebp), %xmm2
-; X32-SSE2-NEXT:    packsswb %xmm3, %xmm2
-; X32-SSE2-NEXT:    movdqa %xmm2, %xmm1
-; X32-SSE2-NEXT:    movl %ebp, %esp
-; X32-SSE2-NEXT:    popl %ebp
-; X32-SSE2-NEXT:    retl
-;
-; X32-SSE41-LABEL: sext_32xi1_to_32xi8:
-; X32-SSE41:       # %bb.0:
-; X32-SSE41-NEXT:    pushl %ebp
-; X32-SSE41-NEXT:    movl %esp, %ebp
-; X32-SSE41-NEXT:    andl $-16, %esp
-; X32-SSE41-NEXT:    subl $16, %esp
-; X32-SSE41-NEXT:    movdqa 8(%ebp), %xmm3
-; X32-SSE41-NEXT:    pcmpeqw 40(%ebp), %xmm1
-; X32-SSE41-NEXT:    pcmpeqw 24(%ebp), %xmm0
-; X32-SSE41-NEXT:    packsswb %xmm1, %xmm0
-; X32-SSE41-NEXT:    pcmpeqw 72(%ebp), %xmm3
-; X32-SSE41-NEXT:    pcmpeqw 56(%ebp), %xmm2
-; X32-SSE41-NEXT:    packsswb %xmm3, %xmm2
-; X32-SSE41-NEXT:    movdqa %xmm2, %xmm1
-; X32-SSE41-NEXT:    movl %ebp, %esp
-; X32-SSE41-NEXT:    popl %ebp
-; X32-SSE41-NEXT:    retl
+; X32-SSE-LABEL: sext_32xi1_to_32xi8:
+; X32-SSE:       # %bb.0:
+; X32-SSE-NEXT:    pushl %ebp
+; X32-SSE-NEXT:    movl %esp, %ebp
+; X32-SSE-NEXT:    andl $-16, %esp
+; X32-SSE-NEXT:    subl $16, %esp
+; X32-SSE-NEXT:    movdqa 8(%ebp), %xmm3
+; X32-SSE-NEXT:    pcmpeqw 40(%ebp), %xmm1
+; X32-SSE-NEXT:    pcmpeqw 24(%ebp), %xmm0
+; X32-SSE-NEXT:    packsswb %xmm1, %xmm0
+; X32-SSE-NEXT:    pcmpeqw 72(%ebp), %xmm3
+; X32-SSE-NEXT:    pcmpeqw 56(%ebp), %xmm2
+; X32-SSE-NEXT:    packsswb %xmm3, %xmm2
+; X32-SSE-NEXT:    movdqa %xmm2, %xmm1
+; X32-SSE-NEXT:    movl %ebp, %esp
+; X32-SSE-NEXT:    popl %ebp
+; X32-SSE-NEXT:    retl
   %a = icmp eq <32 x i16> %c1, %c2
   %b = sext <32 x i1> %a to <32 x i8>
   ret <32 x i8> %b




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