[PATCH] D62392: [DAGCombine][ARM] (sub Carry, X) -> (addcarry (sub 0, X), 0, Carry) fold
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri May 24 15:15:18 PDT 2019
efriedma added a comment.
It looks like we don't have great test coverage here. In general, we probably need to restrict getAsCarry depending on whether the intended use is an an addition or subtraction, at least for ARM.
================
Comment at: test/CodeGen/ARM/addsubcarry-promotion.ll:28
+; THUMBV6M-NEXT: rsbs r2, r2, #0
+; THUMBV6M-NEXT: sxth r2, r2
; THUMBV6M-NEXT: movs r3, #0
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The redundant sxth here is unfortunate, but probably orthogonal. Maybe a missing SimplifyDemandedBits case?
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https://reviews.llvm.org/D62392/new/
https://reviews.llvm.org/D62392
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