[PATCH] D62266: [DAGCombine][X86][AArch64][ARM] (C - x) + y -> (y - x) + C fold

Fri May 24 15:07:15 PDT 2019

efriedma added inline comments.

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Comment at: test/CodeGen/ARM/addsubcarry-promotion.ll:10

+; FIXME: this could be optimized better.
+
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It looks like this test didn't get rebased correctly?

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Comment at: test/CodeGen/ARM/addsubcarry-promotion.ll:35
+; THUMBV6M-NEXT:    ldr r1, .LCPI0_0
+; THUMBV6M-NEXT:    cmp r0, r1
+; THUMBV6M-NEXT:    beq .LBB0_2
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The big difference that's making the new code worse, now, is that somehow the compare `x==0` is getting transformed to something more like `x==-1`... and I guess something isn't handling that well. That's probably something the ARM backend should be handling in target-specific code, though; feel free to just file a bug for the missed optimization on `void a(int s, void f()) { if ((short)s==-1)f(); }`

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D62266/new/

https://reviews.llvm.org/D62266