[PATCH] D62426: [GlobalISel][AArch64] Make FP constraint checks consider possible use/def register banks

[Jessica Paquette via Phabricator via llvm-commits]

paquette created this revision.
paquette added a reviewer: aemerson.
Herald added subscribers: Petar.Avramovic, hiraditya, kristof.beyls, javed.absar, rovka.
Herald added a project: LLVM.

In a few places in `getInstrMapping`, we check if use/def instructions for the instruction we're mapping have floating point constraints.

      

We can improve this check and save some emitted copies if we make a couple observations:

      

- For a def instruction, it only matters if the def instruction must *always* output a value stored on a FPR
- For a use instruction, it only matters if the use instruction must *always* only take in values stored in FPRs

This adds two new functions:

- `onlyUsesFP`
- `onlyDefinesFP`

Then we can use those when we're checking the uses/defs instead.

Without this patch, the load, unmerge, store, and select in the added test would have unnecessary copies. RegbankSelect won't recognize that the inputs/outputs of the instructions must be on FPRs, and so it will put them on GPRs.


https://reviews.llvm.org/D62426

Files:
  llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
  llvm/lib/Target/AArch64/AArch64RegisterBankInfo.h
  llvm/test/CodeGen/AArch64/GlobalISel/regbank-fp-use-def.mir

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