[PATCH] D62370: [NFC] Check the endianness after the CodeGenPrepare

[Qing Shan Zhang via Phabricator via llvm-commits]

steven.zhang created this revision.
steven.zhang added reviewers: jonpa, RKSimon, efriedma, jsji, hfinkel.
Herald added a project: LLVM.

This test case was added by https://reviews.llvm.org/D44396 to check the endianness to make sure that, splitMergedValStore works as expected. And it checks the endianness basing on the assembly instructions.

The patch in https://reviews.llvm.org/D61843 is trying to combine some stores into one with some conditions. And for this case, the splitMergedValStore will split the stores, and the split stores matches the pattern of D61843 <https://reviews.llvm.org/D61843>, which result in the check failed.

Therefore, I commit this NFC patch to do the endianness check after CodeGenPrepare to avoid the interfere from later transformation.


https://reviews.llvm.org/D62370

Files:
  llvm/test/CodeGen/SystemZ/codegenprepare-splitstore.ll


Index: llvm/test/CodeGen/SystemZ/codegenprepare-splitstore.ll
===================================================================
--- llvm/test/CodeGen/SystemZ/codegenprepare-splitstore.ll
+++ llvm/test/CodeGen/SystemZ/codegenprepare-splitstore.ll
@@ -1,14 +1,22 @@
 ; Test that CodeGenPrepare respects endianness when splitting a store.
 ;
-; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 -force-split-store < %s  | FileCheck %s
+; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 -stop-after codegenprepare -force-split-store < %s  | FileCheck %s
 
 define void @fun(i16* %Src, i16* %Dst) {
-; CHECK-LABEL: # %bb.0:
-; CHECK:       lh   %r0, 0(%r2)
-; CHECK-NEXT:  stc  %r0, 1(%r3)
-; CHECK-NEXT:  srl  %r0, 8
-; CHECK-NEXT:  stc  %r0, 0(%r3)
-; CHECK-NEXT:  br   %r14
+; CHECK-LABEL: @fun(
+; CHECK:      %1 = load i16, i16* %Src
+; CHECK-NEXT: %2 = trunc i16 %1 to i8
+; CHECK-NEXT: %3 = lshr i16 %1, 8
+; CHECK-NEXT: %4 = trunc i16 %3 to i8
+; CHECK-NEXT: %5 = zext i8 %2 to i16
+; CHECK-NEXT: %6 = zext i8 %4 to i16
+; CHECK-NEXT: %7 = shl nuw i16 %6, 8
+; CHECK-NEXT: %8 = or i16 %7, %5
+; CHECK-NEXT: %9 = bitcast i16* %Dst to i8*
+; CHECK-NEXT: %10 = getelementptr i8, i8* %9, i32 1
+; CHECK-NEXT: store i8 %2, i8* %10
+; CHECK-NEXT: %11 = bitcast i16* %Dst to i8*
+; CHECK-NEXT: store i8 %4, i8* %11
   %1 = load i16, i16* %Src
   %2 = trunc i16 %1 to i8
   %3 = lshr i16 %1, 8


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