[llvm] r361526 - [WebAssembly] Implement ReplaceNodeResults to fix a SIMD crash

[Thomas Lively via llvm-commits]

Author: tlively
Date: Thu May 23 11:09:26 2019
New Revision: 361526

URL: http://llvm.org/viewvc/llvm-project?rev=361526&view=rev
Log:
[WebAssembly] Implement ReplaceNodeResults to fix a SIMD crash

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61037

Added:
    llvm/trunk/test/CodeGen/WebAssembly/simd-illegal-signext.ll
Modified:
    llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
    llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.h

Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp?rev=361526&r1=361525&r2=361526&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp Thu May 23 11:09:26 2019
@@ -897,6 +897,21 @@ SDValue WebAssemblyTargetLowering::Lower
   return Chain;
 }
 
+void WebAssemblyTargetLowering::ReplaceNodeResults(
+    SDNode *N, SmallVectorImpl<SDValue> &Results, SelectionDAG &DAG) const {
+  switch (N->getOpcode()) {
+  case ISD::SIGN_EXTEND_INREG:
+    // Do not add any results, signifying that N should not be custom lowered
+    // after all. This happens because simd128 turns on custom lowering for
+    // SIGN_EXTEND_INREG, but for non-vector sign extends the result might be an
+    // illegal type.
+    break;
+  default:
+    llvm_unreachable(
+        "ReplaceNodeResults not implemented for this op for WebAssembly!");
+  }
+}
+
 //===----------------------------------------------------------------------===//
 //  Custom lowering hooks.
 //===----------------------------------------------------------------------===//

Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.h?rev=361526&r1=361525&r2=361526&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.h (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.h Thu May 23 11:09:26 2019
@@ -85,6 +85,9 @@ private:
                                const SDLoc &DL, SelectionDAG &DAG,
                                SmallVectorImpl<SDValue> &InVals) const override;
 
+  void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
+                          SelectionDAG &DAG) const override;
+
   // Custom lowering hooks.
   SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
   SDValue LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;

Added: llvm/trunk/test/CodeGen/WebAssembly/simd-illegal-signext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/simd-illegal-signext.ll?rev=361526&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/simd-illegal-signext.ll (added)
+++ llvm/trunk/test/CodeGen/WebAssembly/simd-illegal-signext.ll Thu May 23 11:09:26 2019
@@ -0,0 +1,24 @@
+; RUN: llc < %s -mattr=+simd128 | FileCheck %s
+
+; Regression test for a crash caused by
+; WebAssemblyTargetLowering::ReplaceNodeResults not being
+; implemented. Since SIMD is enabled, sign_ext_inreg is custom lowered
+; but the result is i16, an illegal value. This requires
+; ReplaceNodeResults to resolve, but the default implementation is to
+; abort.
+
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
+target triple = "wasm32-unknown-emscripten"
+
+; CHECK: i32.load8_s
+; CHECK-NEXT: i32.store16
+define void @foo() {
+entry:
+  %0 = load i32*, i32** undef, align 4
+  %1 = load i32, i32* %0, align 4
+  %2 = load i32, i32* undef, align 4
+  %conv67 = trunc i32 %2 to i8
+  %conv68 = sext i8 %conv67 to i16
+  store i16 %conv68, i16* null, align 2
+  ret void
+}