[PATCH] D62311: [LV] Inform about exactly reason of loop illegality

[Pavel Samolysov via Phabricator via llvm-commits]

psamolysov updated this revision to Diff 200963.
psamolysov marked an inline comment as done.
psamolysov added a comment.

As **fhahn**  commented, the message on line 602 repeats one on line 606, remove the last.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D62311/new/

https://reviews.llvm.org/D62311

Files:
  llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
  llvm/lib/Transforms/Vectorize/LoopVectorize.cpp


Index: llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
===================================================================
--- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -1432,6 +1432,9 @@
     RPOT.perform(LI);
     if (!containsIrreducibleCFG<const BasicBlock *>(RPOT, *LI)) {
       V.push_back(&L);
+      LLVM_DEBUG(dbgs() << "LV: The loop '"
+                        << L.getName()
+                        << "' is eligible as supported.\n");
       // TODO: Collect inner loops inside marked outer loops in case
       // vectorization fails for the outer loop. Do not invoke
       // 'containsIrreducibleCFG' again for inner loops when the outer loop is
@@ -7579,16 +7582,22 @@
   // legality and profitability checks. This means running the loop vectorizer
   // will simplify all loops, regardless of whether anything end up being
   // vectorized.
-  for (auto &L : *LI)
-    Changed |=
+  for (auto &L : *LI) {
+    bool Simplified =
         simplifyLoop(L, DT, LI, SE, AC, nullptr, false /* PreserveLCSSA */);
+    LLVM_DEBUG(
+      if (Simplified)
+        dbgs() << "LV: The loop '" << L->getName() << "' has been simplified.\n";
+    );
+    Changed |= Simplified;
+  }
 
   // Build up a worklist of inner-loops to vectorize. This is necessary as
   // the act of vectorizing or partially unrolling a loop creates new loops
   // and can invalidate iterators across the loops.
   SmallVector<Loop *, 8> Worklist;
 
-  for (Loop *L : *LI)
+  for (auto &L : *LI)
     collectSupportedLoops(*L, LI, ORE, Worklist);
 
   LoopsAnalyzed += Worklist.size();
Index: llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
===================================================================
--- llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
+++ llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
@@ -599,9 +599,10 @@
         // Check that this PHI type is allowed.
         if (!PhiTy->isIntegerTy() && !PhiTy->isFloatingPointTy() &&
             !PhiTy->isPointerTy()) {
+          LLVM_DEBUG(dbgs()
+                 << "LV: Not vectorizing: Found a non-int non-pointer PHI.\n");
           ORE->emit(createMissedAnalysis("CFGNotUnderstood", Phi)
                     << "loop control flow is not understood by vectorizer");
-          LLVM_DEBUG(dbgs() << "LV: Found an non-int non-pointer PHI.\n");
           return false;
         }
 
@@ -967,7 +968,8 @@
   // We must have a loop in canonical form. Loops with indirectbr in them cannot
   // be canonicalized.
   if (!Lp->getLoopPreheader()) {
-    LLVM_DEBUG(dbgs() << "LV: Loop doesn't have a legal pre-header.\n");
+    LLVM_DEBUG(dbgs()
+             << "LV: Not vectorizing: Loop doesn't have a legal pre-header.\n");
     ORE->emit(createMissedAnalysis("CFGNotUnderstood")
               << "loop control flow is not understood by vectorizer");
     if (DoExtraAnalysis)
@@ -978,6 +980,8 @@
 
   // We must have a single backedge.
   if (Lp->getNumBackEdges() != 1) {
+    LLVM_DEBUG(dbgs()
+            << "LV: Not vectorizing: The loop must have a single backedge.\n");
     ORE->emit(createMissedAnalysis("CFGNotUnderstood")
               << "loop control flow is not understood by vectorizer");
     if (DoExtraAnalysis)
@@ -988,6 +992,8 @@
 
   // We must have a single exiting block.
   if (!Lp->getExitingBlock()) {
+    LLVM_DEBUG(dbgs()
+            << "LV: Not vectorizing: The loop must have an exiting block.\n");
     ORE->emit(createMissedAnalysis("CFGNotUnderstood")
               << "loop control flow is not understood by vectorizer");
     if (DoExtraAnalysis)
@@ -1000,6 +1006,8 @@
   // checked at the end of each iteration. With that we can assume that all
   // instructions in the loop are executed the same number of times.
   if (Lp->getExitingBlock() != Lp->getLoopLatch()) {
+    LLVM_DEBUG(dbgs()
+          << "LV: Not vectorizing: The exiting block is not the loop latch.\n");
     ORE->emit(createMissedAnalysis("CFGNotUnderstood")
               << "loop control flow is not understood by vectorizer");
     if (DoExtraAnalysis)


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