[PATCH] D60762: [SelectionDAG] Legalize vaargs that require vector splitting
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 23 03:30:19 PDT 2019
RKSimon added inline comments.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp:1860
+ if (DAG.getDataLayout().isBigEndian())
+ std::swap(Lo, Hi);
+
----------------
luke wrote:
> efriedma wrote:
> > This probably doesn't match how the vector will actually be passed on a big-endian target. Endianness doesn't affect the ordering of the elements of a vector in LLVM. (See also http://llvm.org/docs/BigEndianNEON.html .)
> Ok, so from what I understand then it should be fine to just remove this swap?
Yes, but we need test coverage - copying legalize-vaarg.ll as a powerpc test with le and be targets should be straightforward?
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rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D60762/new/
https://reviews.llvm.org/D60762
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