[PATCH] D62267: [GlobalISel][AArch64] Improve register bank mappings for G_SELECT

[Jessica Paquette via Phabricator via llvm-commits]

paquette created this revision.
paquette added a reviewer: aemerson.
Herald added subscribers: Petar.Avramovic, hiraditya, kristof.beyls, javed.absar, rovka.
Herald added a project: LLVM.

The fcsel and cases instructions differ in only the register banks they work on. So, they're entirely interchangeable otherwise.

With this in mind, this does two things:

- Teach AArch64RegisterBankInfo to consider the inputs to G_SELECT as well as the outputs.
- Teach it to choose the best register bank mapping based off the constraints of the inputs and outputs.

The "best" in this case means the one that requires the smallest number of copies to properly emit a fcsel/csel.

For example, if the inputs are all already going to be on FPRs, we should emit an fcsel, even if the output is a GPR. This costs one copy to produce the result, but saves us from copying the inputs into GPRs.

This saves some copies in optimized builds.


https://reviews.llvm.org/D62267

Files:
  llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/regbank-select.mir

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