[PATCH] D62028: [DebugInfo][AArch64] Recognise target specific instruction as mov instr

[Eli Friedman via Phabricator via llvm-commits]

efriedma added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.cpp:5521
+  // and zero immediate operands used as an alias for mov instruction.
+  if ((MI.getOpcode() == AArch64::ORRWrs) && MI.getOperand(1).isReg() &&
+      (MI.getOperand(1).getReg() == AArch64::WZR) && MI.getOperand(3).isImm() &&
----------------
The isReg/isImm checks aren't necessary; the legal operands are determined by the opcode.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D62028/new/

https://reviews.llvm.org/D62028