[PATCH] D62017: [CodeGen] Add lrint/llrint builtins
Adhemerval Zanella via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon May 20 08:15:21 PDT 2019
zatrazz updated this revision to Diff 200289.
zatrazz added a comment.
Updated patch based on D62026 <https://reviews.llvm.org/D62026>.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D62017/new/
https://reviews.llvm.org/D62017
Files:
llvm/docs/LangRef.rst
llvm/include/llvm/CodeGen/ISDOpcodes.h
llvm/include/llvm/IR/Intrinsics.td
llvm/include/llvm/IR/RuntimeLibcalls.def
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
llvm/lib/CodeGen/TargetLoweringBase.cpp
llvm/lib/IR/Verifier.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/AArch64/llrint-conv.ll
llvm/test/CodeGen/AArch64/lrint-conv.ll
llvm/test/CodeGen/ARM/llrint-conv.ll
llvm/test/CodeGen/ARM/lrint-conv.ll
llvm/test/CodeGen/Mips/llrint-conv.ll
llvm/test/CodeGen/Mips/lrint-conv.ll
llvm/test/CodeGen/PowerPC/llrint-conv.ll
llvm/test/CodeGen/PowerPC/lrint-conv.ll
llvm/test/CodeGen/X86/llrint-conv-i32.ll
llvm/test/CodeGen/X86/llrint-conv.ll
llvm/test/CodeGen/X86/lrint-conv-i32.ll
llvm/test/CodeGen/X86/lrint-conv.ll
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