[llvm] r360965 - [SystemZ] Bugfix in SystemZTargetLowering::combineIntDIVREM()

[Jonas Paulsson via llvm-commits]

Author: jonpa
Date: Thu May 16 17:50:35 2019
New Revision: 360965

URL: http://llvm.org/viewvc/llvm-project?rev=360965&view=rev
Log:
[SystemZ]  Bugfix in SystemZTargetLowering::combineIntDIVREM()

Make sure to not unroll a vector division/remainder (with a constant splat
divisor) after type legalization, since the scalar type may then be illegal.

Review: Ulrich Weigand
https://reviews.llvm.org/D62036

Added:
    llvm/trunk/test/CodeGen/SystemZ/vec-rem.ll
Modified:
    llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp

Modified: llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp?rev=360965&r1=360964&r2=360965&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp Thu May 16 17:50:35 2019
@@ -5841,7 +5841,7 @@ SDValue SystemZTargetLowering::combineIn
   // since it is not Legal but Custom it can only happen before
   // legalization. Therefore we must scalarize this early before Combine
   // 1. For widened vectors, this is already the result of type legalization.
-  if (VT.isVector() && isTypeLegal(VT) &&
+  if (DCI.Level == BeforeLegalizeTypes && VT.isVector() && isTypeLegal(VT) &&
       DAG.isConstantIntBuildVectorOrConstantInt(N->getOperand(1)))
     return DAG.UnrollVectorOp(N);
   return SDValue();

Added: llvm/trunk/test/CodeGen/SystemZ/vec-rem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SystemZ/vec-rem.ll?rev=360965&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/SystemZ/vec-rem.ll (added)
+++ llvm/trunk/test/CodeGen/SystemZ/vec-rem.ll Thu May 16 17:50:35 2019
@@ -0,0 +1,13 @@
+; Verify that we do not create illegal scalar urems after type legalization.
+;
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13
+
+define <16 x i8> @main(i16 %arg) {
+bb:
+  %tmp6 = insertelement <16 x i16> undef, i16 %arg, i32 0
+  %tmp7 = shufflevector <16 x i16> %tmp6, <16 x i16> undef, <16 x i32> zeroinitializer
+  %tmp8 = insertelement <16 x i8> <i8 undef, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>, i8 undef, i32 0
+  %tmp11 = urem <16 x i16> %tmp7, <i16 29265, i16 29265, i16 29265, i16 29265, i16 29265, i16 29265, i16 29265, i16 29265, i16 29265, i16 29265, i16 29265, i16 29265, i16 29265, i16 29265, i16 29265, i16 29265>
+  %tmp12 = trunc <16 x i16> %tmp11 to <16 x i8>
+  ret <16 x i8> %tmp12
+}