[PATCH] D61981: GlobalISel: Add buildXor/buildNot
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 15 20:14:59 PDT 2019
arsenm created this revision.
arsenm added reviewers: dsanders, aemerson, aditya_nandakumar, paquette.
Herald added subscribers: Petar.Avramovic, kristof.beyls, rovka, wdng.
https://reviews.llvm.org/D61981
Files:
include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp
Index: unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp
===================================================================
--- unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp
+++ unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp
@@ -171,3 +171,31 @@
EXPECT_TRUE(CheckMachineFunction(*MF, CheckStr)) << *MF;
}
+
+TEST_F(GISelMITest, BuildXor) {
+ if (!TM)
+ return;
+
+ LLT S64 = LLT::scalar(64);
+ LLT S128 = LLT::scalar(128);
+ SmallVector<unsigned, 4> Copies;
+ collectCopies(Copies, MF);
+ B.buildXor(S64, Copies[0], Copies[1]);
+ B.buildNot(S64, Copies[0]);
+
+ // Make sure this works with > 64-bit types
+ auto Merge = B.buildMerge(S128, {Copies[0], Copies[1]});
+ B.buildNot(S128, Merge);
+ auto CheckStr = R"(
+ ; CHECK: [[COPY0:%[0-9]+]]:_(s64) = COPY $x0
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
+ ; CHECK: [[XOR0:%[0-9]+]]:_(s64) = G_XOR [[COPY0]]:_, [[COPY1]]:_
+ ; CHECK: [[NEGONE64:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
+ ; CHECK: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[COPY0]]:_, [[NEGONE64]]:_
+ ; CHECK: [[MERGE:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY0]]:_(s64), [[COPY1]]:_(s64)
+ ; CHECK: [[NEGONE128:%[0-9]+]]:_(s128) = G_CONSTANT i128 -1
+ ; CHECK: [[XOR2:%[0-9]+]]:_(s128) = G_XOR [[MERGE]]:_, [[NEGONE128]]:_
+ )";
+
+ EXPECT_TRUE(CheckMachineFunction(*MF, CheckStr)) << *MF;
+}
Index: include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
===================================================================
--- include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
+++ include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
@@ -1263,6 +1263,20 @@
return buildInstr(TargetOpcode::G_OR, {Dst}, {Src0, Src1});
}
+ /// Build and insert \p Res = G_XOR \p Op0, \p Op1
+ MachineInstrBuilder buildXor(const DstOp &Dst, const SrcOp &Src0,
+ const SrcOp &Src1) {
+ return buildInstr(TargetOpcode::G_XOR, {Dst}, {Src0, Src1});
+ }
+
+ /// Build and insert a bitwise not,
+ /// \p NegOne = G_CONSTANT -1
+ /// \p Res = G_OR \p Op0, NegOne
+ MachineInstrBuilder buildNot(const DstOp &Dst, const SrcOp &Src0) {
+ auto NegOne = buildConstant(Dst.getLLTTy(*getMRI()), -1);
+ return buildInstr(TargetOpcode::G_XOR, {Dst}, {Src0, NegOne});
+ }
+
/// Build and insert \p Res = G_FADD \p Op0, \p Op1
MachineInstrBuilder buildFAdd(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1) {
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