[PATCH] D61824: [ARM][AArch64] Overalign .tdata (Android Bionic hack) to fix ld.so implementations that handle p_vaddr%p_align!=0 correctly

[Fangrui Song via Phabricator via llvm-commits]

MaskRay added a comment.

> I'm not sure I understand the comment about ALIGNUP, did you mean the linker script command ALIGN? I guess by perceivable you mean it has more impact on the file and following sections?

Sorry, I meant `ALIGNOF`. If we lower the hack to the OutputSection layer, it may interfere with linker scripts. Though my understanding about linker scripts is largely learned from lld source, I don't use linker scripts myself so I am not very clear what issues it may cause.

> The problem case can only currently happen when there is only .tbss.

This is a good point. I've changed this revision to keep the hack in Writer.cpp (PT_TLS) but restrict the OutputSections.cpp hack to `SHT_NOBITS + SHF_TLS` (`.tbss`). I don't think this overhead on non-Android platforms is small. If we have both `.tdata` and `.tbss`, e.g.

  # this is page aligned
  .section .tdata,"awT", at progbits                                                                                 
  .byte 0                                                                                                         
  
  # this gets overaligned to 8*sizeof(void*)
  .section .tbss,"awT", at progbits
  .byte 0
  
  # Since we have the Writer.cpp:2201 `      P->p_memsz = alignTo(P->p_memsz, P->p_align);` rule, the p_memsz is 8*sizeof(void*) * 2 = 0x80
    Type           Offset   VirtAddr           PhysAddr           FileSiz  MemSiz   Flg Align
    TLS            0x020000 0x0000000000220000 0x0000000000220000 0x000001 0x000080 R   0x40


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  rLLD LLVM Linker

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  https://reviews.llvm.org/D61824/new/

https://reviews.llvm.org/D61824