[PATCH] D61821: gn build: add RISCV target
David L. Jones via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 14 08:19:28 PDT 2019
dlj added inline comments.
================
Comment at: llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn:30
+ ":LLVMRISCVCodeGen",
+ "Utils",
+ ]
----------------
thakis wrote:
> dlj wrote:
> > thakis wrote:
> > > I think this is the first target that has Utils depending on the higher-up tablegen target. What is this needed for?
> > Oh, you're completely right... it should go in the public_deps of Utils. (Now I see what you mean... that's what AArch64 does, too.)
> Thanks for moving RISCVGenSystemOperands to Utils/BUILD.gn. Does Utils still need depend on this tablegen group() here? If so, why? (No other target currently has this dep, as far as I can tell.) If not, can you remove the dep and make LLVMRISCVCodeGen dep on the tablegen targets in this file directly (like in other targets)?
Ah, yes I missed that. The dep isn't needed in Utils... however, it was hiding a couple of other missing deps (from AsmParser and MCTargetDesc).
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D61821/new/
https://reviews.llvm.org/D61821
More information about the llvm-commits
mailing list