[PATCH] D61754: [PowerPC] Custom lower known CR bit spills

Tue May 14 06:45:27 PDT 2019

lei added a comment.

In D61754#1500658 <https://reviews.llvm.org/D61754#1500658>, @hfinkel wrote:

> LGTM.
>
> If this test case proves too fragile in the future, we might replace it with an MIR test.

Hi Hal, I actually tried to create a MIR test first but had a hard time.  I was trying to get the MIR prior to my pass via  `llc -stop-before=regalloc reduced.ll` but it gave me `LLVM ERROR: "regalloc" pass is not registered.`.  I just stopped there as I didn't know how to continue after that... let me know if you have suggestions on how to proceed with this kind of issue and I'll try it next time. Thx!

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https://reviews.llvm.org/D61754