[PATCH] D59990: AMDGPU. Divergence driven ISel. Assign register class for cross block values according to the divergence.
Nicolai Hähnle via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 14 06:23:40 PDT 2019
nhaehnle added a comment.
LGTM apart from a bunch of formatting issues. I haven't marked all of them, please just run clang-format or clang-format-diff.
================
Comment at: include/llvm/CodeGen/TargetLowering.h:646-647
+ virtual bool requiresUniformRegister(MachineFunction &MF,
+ const Value *) const {
+ return false;
----------------
Please run clang-format.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D59990/new/
https://reviews.llvm.org/D59990
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