[llvm] r360616 - [WebAssembly] Don't assume that zext/sext result is i32/i64 in fast isel (PR41841)

[Nikita Popov via llvm-commits]

Author: nikic
Date: Mon May 13 12:40:18 2019
New Revision: 360616

URL: http://llvm.org/viewvc/llvm-project?rev=360616&view=rev
Log:
[WebAssembly] Don't assume that zext/sext result is i32/i64 in fast isel (PR41841)

Usually this will abort fast-isel at the instruction using the
non-legal result, but if the only use is in a different basic block,
we'll incorrectly assume that the zext/sext is to i32 (rather than
i128 in this case).

Differential Revision: https://reviews.llvm.org/D61823

Added:
    llvm/trunk/test/CodeGen/WebAssembly/PR41841.ll
Modified:
    llvm/trunk/lib/Target/WebAssembly/WebAssemblyFastISel.cpp

Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyFastISel.cpp?rev=360616&r1=360615&r2=360616&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyFastISel.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyFastISel.cpp Mon May 13 12:40:18 2019
@@ -523,7 +523,10 @@ unsigned WebAssemblyFastISel::zeroExtend
     return Result;
   }
 
-  return zeroExtendToI32(Reg, V, From);
+  if (To == MVT::i32)
+    return zeroExtendToI32(Reg, V, From);
+
+  return 0;
 }
 
 unsigned WebAssemblyFastISel::signExtend(unsigned Reg, const Value *V,
@@ -542,7 +545,10 @@ unsigned WebAssemblyFastISel::signExtend
     return Result;
   }
 
-  return signExtendToI32(Reg, V, From);
+  if (To == MVT::i32)
+    return signExtendToI32(Reg, V, From);
+
+  return 0;
 }
 
 unsigned WebAssemblyFastISel::getRegForUnsignedValue(const Value *V) {

Added: llvm/trunk/test/CodeGen/WebAssembly/PR41841.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/PR41841.ll?rev=360616&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/PR41841.ll (added)
+++ llvm/trunk/test/CodeGen/WebAssembly/PR41841.ll Mon May 13 12:40:18 2019
@@ -0,0 +1,42 @@
+; RUN: llc < %s -O0 -wasm-disable-explicit-locals -wasm-keep-registers -asm-verbose=false | FileCheck %s
+
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
+target triple = "wasm32-unknown-unknown"
+
+declare void @foo(i128)
+
+; CHECK-LABEL: test_zext:
+; CHECK-NEXT: .functype test_zext (i32) -> (){{$}}
+; CHECK-NEXT: i64.extend_i32_u $[[TMP3:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i64.const $[[TMP4:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: i64.and $[[TMP1:[0-9]+]]=, $[[TMP3]], $[[TMP4]]{{$}}
+; CHECK-NEXT: i64.const $[[TMP2:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: call foo, $[[TMP1]], $[[TMP2]]{{$}}
+; CHECK-NEXT: return{{$}}
+define void @test_zext(i1 %b) nounwind {
+  %res = zext i1 %b to i128
+  br label %next
+
+next:                                             ; preds = %start
+  call void @foo(i128 %res)
+  ret void
+}
+
+; CHECK-LABEL: test_sext:
+; CHECK-NEXT:.functype test_sext (i32) -> (){{$}}
+; CHECK-NEXT: i64.extend_i32_u $[[TMP3:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i64.const $[[TMP4:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: i64.and $[[TMP5:[0-9]+]]=, $[[TMP3]], $[[TMP4]]{{$}}
+; CHECK-NEXT: i64.const $[[TMP6:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: i64.sub $[[TMP1:[0-9]+]]=, $[[TMP6]], $[[TMP5]]{{$}}
+; CHECK-NEXT: local.copy $[[TMP2:[0-9]+]]=, $[[TMP1]]{{$}}
+; CHECK-NEXT: call foo, $[[TMP1]], $[[TMP2]]{{$}}
+; CHECK-NEXT: return{{$}}
+define void @test_sext(i1 %b) nounwind {
+  %res = sext i1 %b to i128
+  br label %next
+
+next:                                             ; preds = %start
+  call void @foo(i128 %res)
+  ret void
+}