[PATCH] D61806: [DAGCombiner] try to move bitcast after extract_subvector
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun May 12 06:11:04 PDT 2019
spatel marked an inline comment as done.
spatel added inline comments.
================
Comment at: llvm/test/CodeGen/X86/sad.ll:1452
; AVX2-NEXT: vmovd %xmm0, %eax
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
----------------
RKSimon wrote:
> weird - if this is all xmm code now why hasn't the vzeroupper gone?
There seem to be several potential missed opportunities to squash this, but we have the following heading into isel:
t142: v4i32 = scalar_to_vector Constant:i32<1>
t143: v8i32 = insert_subvector undef:v8i32, t142, Constant:i64<0>
t141: v8i32 = X86ISD::VZEXT_MOVL t143
t178: v4i32 = extract_subvector t141, Constant:i64<0>
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https://reviews.llvm.org/D61806/new/
https://reviews.llvm.org/D61806
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