[PATCH] D61825: [ARM][AArch64] Put Android Bionic PT_TLS overaligning hack under --android-tls

[Fangrui Song via Phabricator via llvm-commits]

MaskRay created this revision.
MaskRay added reviewers: peter.smith, rprichard, ruiu.
Herald added subscribers: llvm-commits, kristof.beyls, arichardson, javed.absar, emaste, srhines.
Herald added a reviewer: espindola.
Herald added a project: LLVM.

Fixes PR41527

D53906 <https://reviews.llvm.org/D53906> increased p_align of PT_TLS on ARM/AArch64 to 32/64 to make the
TLS layout compatible with Android/Bionic. However, this causes issues
on glibc ARM/AArch64 platforms using initial-exec TLS model (lld's and
glibc's understanding of TPREL is different).

The problem is that we increase the p_align of the PT_TLS after the
OutputSection's addresses are fixed (assignAddress()). This may create a
PT_TLS that makes p_vaddr%p_align!=0. It turns out glibc elf/dl-tls.c
doesn't handle such PT_TLS correctly (the executable's TLS offset is
2*sizeof(void*) instead of alignUp(2*sizeof(void*), exe.p_align)).

An approach to make both Bionic and glibc happy is to overalign SHF_TLS
instead of PT_TLS, but it may waste nearly 8*WordSize * 2 bytes of each
thread (when both .tbss and .tdata exist and are overaligned).

The unconditional overhead is probably unfair to other ld.so
implementations. So keep this hack under an option.


Repository:
  rLLD LLVM Linker

https://reviews.llvm.org/D61825

Files:
  ELF/Config.h
  ELF/Driver.cpp
  ELF/Options.td
  ELF/Writer.cpp
  docs/ld.lld.1
  test/ELF/aarch64-cortex-a53-843419-tlsrelax.s
  test/ELF/aarch64-tls-gdle.s
  test/ELF/aarch64-tls-iele.s
  test/ELF/aarch64-tls-le.s
  test/ELF/aarch64-tlsld-ldst.s
  test/ELF/android-tls.s
  test/ELF/arm-tls-le32.s
  test/ELF/arm-tls-norelax-ie-le.s

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D61825.199145.patch
Type: text/x-patch
Size: 13216 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190511/68ad8266/attachment.bin>