[PATCH] D61823: [WebAssembly] Don't assume that zext/sext result is i32/i64 in fast isel (PR41841)

[Nikita Popov via Phabricator via llvm-commits]

nikic created this revision.
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Herald added subscribers: llvm-commits, sunfish, aheejin, hiraditya, jgravelle-google, sbc100, dschuff.
Herald added a project: LLVM.

Usually this will abort fast-isel at the instruction using the non-legal result, but if the only use is in a different basic block, we'll incorrectly assume that the zext/sext is to i32 (rather than i128 in this case).


Repository:
  rL LLVM

https://reviews.llvm.org/D61823

Files:
  llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
  llvm/test/CodeGen/WebAssembly/PR41841.ll


Index: llvm/test/CodeGen/WebAssembly/PR41841.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/WebAssembly/PR41841.ll
@@ -0,0 +1,48 @@
+; RUN: llc < %s -O0 -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
+
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
+target triple = "wasm32-unknown-unknown"
+
+declare void @foo(i128)
+
+define void @test_zext(i1 %b) nounwind {
+; CHECK-LABEL: test_zext:
+; CHECK-NEXT: .functype	test_zext (i32) -> (){{$}}
+; CHECK-NEXT: # %bb.0:
+; CHECK-NEXT: i64.extend_i32_u	$[[TMP3:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT:	i64.const	$[[TMP4:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT:	i64.and 	$[[TMP1:[0-9]+]]=, $[[TMP3]], $[[TMP4]]{{$}}
+; CHECK-NEXT:	i64.const	$[[TMP2:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: # %bb.1:
+; CHECK-NEXT:	call    	foo, $[[TMP1]], $[[TMP2]]{{$}}
+; CHECK-NEXT:	return{{$}}
+;
+  %res = zext i1 %b to i128
+  br label %next
+
+next:                                             ; preds = %start
+  call void @foo(i128 %res)
+  ret void
+}
+
+define void @test_sext(i1 %b) nounwind {
+; CHECK-LABEL: test_sext:
+; CHECK-NEXT: .functype	test_sext (i32) -> (){{$}}
+; CHECK-NEXT: # %bb.0:
+; CHECK-NEXT: i64.extend_i32_u	$[[TMP3:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT:	i64.const	$[[TMP4:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT:	i64.and 	$[[TMP5:[0-9]+]]=, $[[TMP3]], $[[TMP4]]{{$}}
+; CHECK-NEXT:	i64.const	$[[TMP6:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: i64.sub 	$[[TMP1:[0-9]+]]=, $[[TMP6]], $[[TMP5]]{{$}}
+; CHECK-NEXT: local.copy	$[[TMP2:[0-9]+]]=, $[[TMP1]]{{$}}
+; CHECK-NEXT: # %bb.1:
+; CHECK-NEXT:	call    	foo, $[[TMP1]], $[[TMP2]]{{$}}
+; CHECK-NEXT:	return{{$}}
+;
+  %res = sext i1 %b to i128
+  br label %next
+
+next:                                             ; preds = %start
+  call void @foo(i128 %res)
+  ret void
+}
Index: llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
===================================================================
--- llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
+++ llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
@@ -523,7 +523,10 @@
     return Result;
   }
 
-  return zeroExtendToI32(Reg, V, From);
+  if (To == MVT::i32)
+    return zeroExtendToI32(Reg, V, From);
+
+  return 0;
 }
 
 unsigned WebAssemblyFastISel::signExtend(unsigned Reg, const Value *V,
@@ -542,7 +545,10 @@
     return Result;
   }
 
-  return signExtendToI32(Reg, V, From);
+  if (To == MVT::i32)
+    return signExtendToI32(Reg, V, From);
+
+  return 0;
 }
 
 unsigned WebAssemblyFastISel::getRegForUnsignedValue(const Value *V) {


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