[PATCH] D61802: [LoopVectorize] Enable float minmax reductions via instruction flag

Nicolau Werneck via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri May 10 13:05:19 PDT 2019


nlw0 created this revision.
nlw0 added reviewers: spatel, mkuper.
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.

Reduction loops with the `min` function get vectorized today for integers and floats, but in the second case the function attribute "no-nans-fp-math" is required. This patch makes the vectorization for floats not strictly dependent on that, further enabling it if fcmp has the nnan instruction flag.

This issue is alluded to in bug report #35538 https://bugs.llvm.org/show_bug.cgi?id=35538#c1 .


Repository:
  rL LLVM

https://reviews.llvm.org/D61802

Files:
  llvm/lib/Analysis/IVDescriptors.cpp
  llvm/test/Transforms/LoopVectorize/float-minmax-instruction-flag.ll


Index: llvm/test/Transforms/LoopVectorize/float-minmax-instruction-flag.ll
===================================================================
--- /dev/null
+++ llvm/test/Transforms/LoopVectorize/float-minmax-instruction-flag.ll
@@ -0,0 +1,72 @@
+; RUN: opt < %s  -loop-vectorize -force-vector-width=4 | FileCheck %s
+
+; The function finds the smallest value from a float vector.
+; Check if vectorization is enabled by instruction flag `fcmp nnan`.
+;CHECK-LABEL: @minloop(
+;CHECK: load <4 x float>
+define float @minloop(float* nocapture readonly) {
+top:
+  %1 = load float, float* %0
+  br label %loop
+
+loop:
+  %2 = phi i64 [ %8, %loop ], [ 1, %top ]
+  %3 = phi float [ %7, %loop ], [ %1, %top ]
+  %4 = getelementptr float, float* %0, i64 %2
+  %5 = load float, float* %4, align 4
+  %6 = fcmp nnan olt float %3, %5
+  %7 = select i1 %6, float %3, float %5
+  %8 = add i64 %2, 1
+  %9 = icmp eq i64 %8, 65537
+  br i1 %9, label %out, label %loop
+
+out:
+  ret float %7
+}
+
+; Check if vectorization is still enabled by function attribute.
+;CHECK-LABEL: @minloopattr(
+;CHECK: load <4 x float>
+define float @minloopattr(float* nocapture readonly) #0 {
+top:
+  %1 = load float, float* %0
+  br label %loop
+
+loop:
+  %2 = phi i64 [ %8, %loop ], [ 1, %top ]
+  %3 = phi float [ %7, %loop ], [ %1, %top ]
+  %4 = getelementptr float, float* %0, i64 %2
+  %5 = load float, float* %4, align 4
+  %6 = fcmp olt float %3, %5
+  %7 = select i1 %6, float %3, float %5
+  %8 = add i64 %2, 1
+  %9 = icmp eq i64 %8, 65537
+  br i1 %9, label %out, label %loop
+
+out:
+  ret float %7
+}
+attributes #0 = { "no-nans-fp-math"="true" }
+
+; Check if vectorization is prevented without the flag or attribute.
+;CHECK-LABEL: @minloopnovec(
+;CHECK-NOT: load <4 x float>
+define float @minloopnovec(float* nocapture readonly) {
+top:
+  %1 = load float, float* %0
+  br label %loop
+
+loop:
+  %2 = phi i64 [ %8, %loop ], [ 1, %top ]
+  %3 = phi float [ %7, %loop ], [ %1, %top ]
+  %4 = getelementptr float, float* %0, i64 %2
+  %5 = load float, float* %4, align 4
+  %6 = fcmp olt float %3, %5
+  %7 = select i1 %6, float %3, float %5
+  %8 = add i64 %2, 1
+  %9 = icmp eq i64 %8, 65537
+  br i1 %9, label %out, label %loop
+
+out:
+  ret float %7
+}
Index: llvm/lib/Analysis/IVDescriptors.cpp
===================================================================
--- llvm/lib/Analysis/IVDescriptors.cpp
+++ llvm/lib/Analysis/IVDescriptors.cpp
@@ -587,7 +587,9 @@
   case Instruction::FCmp:
   case Instruction::ICmp:
     if (Kind != RK_IntegerMinMax &&
-        (!HasFunNoNaNAttr || Kind != RK_FloatMinMax))
+        (!(HasFunNoNaNAttr || I->getOpcode() == Instruction::Select ||
+           I->hasNoNaNs()) ||
+         Kind != RK_FloatMinMax))
       return InstDesc(false, I);
     return isMinMaxSelectCmpPattern(I, Prev);
   }


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