[PATCH] D61794: [LVI][CVP] Add support for abs/nabs select pattern flavor
Nikita Popov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri May 10 10:43:13 PDT 2019
nikic created this revision.
nikic added reviewers: reames, spatel, lebedev.ri.
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.
Based on ConstantRange support added in D61084 <https://reviews.llvm.org/D61084>, we can now handle abs and nabs select pattern flavors in LVI.
Repository:
rL LLVM
https://reviews.llvm.org/D61794
Files:
llvm/lib/Analysis/LazyValueInfo.cpp
llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
Index: llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
===================================================================
--- llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
+++ llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
@@ -633,8 +633,7 @@
; CHECK-NEXT: store i1 true, i1* [[P:%.*]]
; CHECK-NEXT: [[C2:%.*]] = icmp slt i32 [[ABS]], 19
; CHECK-NEXT: store i1 [[C2]], i1* [[P]]
-; CHECK-NEXT: [[C3:%.*]] = icmp sge i32 [[ABS]], 0
-; CHECK-NEXT: store i1 [[C3]], i1* [[P]]
+; CHECK-NEXT: store i1 true, i1* [[P]]
; CHECK-NEXT: [[C4:%.*]] = icmp sge i32 [[ABS]], 1
; CHECK-NEXT: store i1 [[C4]], i1* [[P]]
; CHECK-NEXT: br label [[EXIT]]
@@ -684,8 +683,7 @@
; CHECK-NEXT: store i1 true, i1* [[P:%.*]]
; CHECK-NEXT: [[C2:%.*]] = icmp slt i32 [[ABS]], 19
; CHECK-NEXT: store i1 [[C2]], i1* [[P]]
-; CHECK-NEXT: [[C3:%.*]] = icmp sge i32 [[ABS]], 0
-; CHECK-NEXT: store i1 [[C3]], i1* [[P]]
+; CHECK-NEXT: store i1 true, i1* [[P]]
; CHECK-NEXT: [[C4:%.*]] = icmp sge i32 [[ABS]], 1
; CHECK-NEXT: store i1 [[C4]], i1* [[P]]
; CHECK-NEXT: br label [[EXIT]]
@@ -735,8 +733,7 @@
; CHECK-NEXT: store i1 true, i1* [[P:%.*]]
; CHECK-NEXT: [[C2:%.*]] = icmp sgt i32 [[NABS]], -19
; CHECK-NEXT: store i1 [[C2]], i1* [[P]]
-; CHECK-NEXT: [[C3:%.*]] = icmp sle i32 [[NABS]], 0
-; CHECK-NEXT: store i1 [[C3]], i1* [[P]]
+; CHECK-NEXT: store i1 true, i1* [[P]]
; CHECK-NEXT: [[C4:%.*]] = icmp sle i32 [[NABS]], -1
; CHECK-NEXT: store i1 [[C4]], i1* [[P]]
; CHECK-NEXT: br label [[EXIT]]
@@ -786,8 +783,7 @@
; CHECK-NEXT: store i1 true, i1* [[P:%.*]]
; CHECK-NEXT: [[C2:%.*]] = icmp sgt i32 [[NABS]], -19
; CHECK-NEXT: store i1 [[C2]], i1* [[P]]
-; CHECK-NEXT: [[C3:%.*]] = icmp sle i32 [[NABS]], 0
-; CHECK-NEXT: store i1 [[C3]], i1* [[P]]
+; CHECK-NEXT: store i1 true, i1* [[P]]
; CHECK-NEXT: [[C4:%.*]] = icmp sle i32 [[NABS]], -1
; CHECK-NEXT: store i1 [[C4]], i1* [[P]]
; CHECK-NEXT: br label [[EXIT]]
Index: llvm/lib/Analysis/LazyValueInfo.cpp
===================================================================
--- llvm/lib/Analysis/LazyValueInfo.cpp
+++ llvm/lib/Analysis/LazyValueInfo.cpp
@@ -893,7 +893,28 @@
return true;
}
- // TODO: ABS, NABS from the SelectPatternResult
+ if (SPR.Flavor == SPF_ABS) {
+ if (LHS == SI->getTrueValue()) {
+ BBLV = ValueLatticeElement::getRange(TrueCR.abs());
+ return true;
+ }
+ if (LHS == SI->getFalseValue()) {
+ BBLV = ValueLatticeElement::getRange(FalseCR.abs());
+ return true;
+ }
+ }
+
+ if (SPR.Flavor == SPF_NABS) {
+ ConstantRange Zero(APInt::getNullValue(TrueCR.getBitWidth()));
+ if (LHS == SI->getTrueValue()) {
+ BBLV = ValueLatticeElement::getRange(Zero.sub(TrueCR.abs()));
+ return true;
+ }
+ if (LHS == SI->getFalseValue()) {
+ BBLV = ValueLatticeElement::getRange(Zero.sub(FalseCR.abs()));
+ return true;
+ }
+ }
}
// Can we constrain the facts about the true and false values by using the
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