[PATCH] D61782: [X86][SSE] Relax use limits for lowerAddSubToHorizontalOp (PR32433)

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.
RKSimon added reviewers: spatel, craig.topper, andreadb.
Herald added a project: LLVM.

Now that we can use HADD/SUB for scalar additions from any pair of extracted elements (D61263 <https://reviews.llvm.org/D61263>), we can relax the one use limit as we will be able to merge multiple uses into using the same HADD/SUB op.

This exposes a couple of missed opportunities (but nothing I'd consider a real regression against trunk) - I'd prefer to work on fixing those independently but I may have fixed some before this patch gets reviewed.

test16_v16i32_undef/test17_v16i32_undef - we are not managing to reduce the size of the vphaddd to the bottom xmm. On avx512 for fast-hop cases we now can do that but end up with an extra VMOVQ due to a failed demanded elts when inserting back into the (legal) v16i32 type.


Repository:
  rL LLVM

https://reviews.llvm.org/D61782

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/haddsub-undef.ll
  test/CodeGen/X86/phaddsub-undef.ll

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