[PATCH] D61705: Tablegen type comparison LE should be LT or equal.

Thu May 9 05:47:49 PDT 2019

kparzysz added inline comments.

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Comment at: llvm/utils/TableGen/CodeGenDAGPatterns.cpp:517
-    // Note on the < comparison below:
-    // X86 has patterns like
-    //   (set VR128X:$dst, (v16i8 (X86vtrunc (v4i32 VR128X:$src1)))),
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petecoup wrote:
> Krzysztof, I believe you made this change?  I was not able to find these trunc patterns in the X86 backend, and all the default backends seem to build/test fine with my change here.  Can you comment on whether this looks OK to you?
I think it was originally < or ==, but then I encountered those issues in the x86 backend, so I changed it to <.  In any case, the original intent was <=, so if it works now, I'm fine with it.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D61705/new/

https://reviews.llvm.org/D61705